Custom HBM Architecture and Design Engineer

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Custom HBM Architecture and Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. Key Responsibilities Analyze hardware and software interaction at the system level to identify bottlenecks in existing AI/ML workloads and HBM‑based hardware. Drive future HBM architecture, design, and technology to address bottlenecks, including implementing proof of concept designs. Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Architect and design memory sub‑systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi‑functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field. Minimum of 10 years of experience in a related field. Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies. Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and sign‑off considerations. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting). Preferred Qualifications Experience with HBM, DRAM, or memory‑centric SoC designs. Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts. Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug. Experience with hardware emulation or acceleration platforms (e.g., Palladium, Veloce, Zebu). Compensation The US base salary range for this full‑time position is: $165,000.00 - $329,000.00 a year. Additional compensation may include benefits, bonuses and equity. Benefits Micron offers a choice of medical, dental and vision plans. Benefit programs protect income if unable to work due to illness or injury, and paid family leave. Programs also include a robust paid time‑off program and paid holidays. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr 1000 Micron Technology, Inc.