Senior ASIC Design Engineer

job summary:
Seeking a Senior ASIC Design Engineer for a high growth defense contractor in the Dallas, TX area.

The Senior Design Engineer will be responsible for leading the development of next-generation Image Processing SoCs. In this role, you will be responsible for architecting, designing, and implementing complex Verilog/SystemVerilog blocks that power high-performance thermal imaging systems.

• Experience with SoC/CPU/GPU architecture, AXI interconnects, high-speed interfaces, and high bandwidth techniques.

• Prefer 10+ years of industry hands-on RTL design experience, although would consider 5+ years for the right candidate.

• Proficiency in Verilog / System Verilog.

W-2 benefits offered! Apply now!

location: Dallas, Texas
job type: Contract
salary: $100 - 120 per hour
work hours: 8am to 4pm
education: Bachelors

responsibilities:

• RTL Development: Design and implement complex logic blocks in Verilog/SystemVerilog for real-time image processing pipelines.

• Architecture Integration: Integrate SoC components including CPUs, GPUs, and specialized NPU/ISP cores , ensuring seamless communication via AXI/AHB interconnects .

• High-Speed Design: Develop high-speed interfaces and implement techniques for managing high-bandwidth memory traffic (DDR/LPDDR) to support high-resolution sensor data.

• Performance Optimization: Conduct area, power, and timing analysis to meet the stringent SWaP (Size, Weight, and Power) requirements of tactical electro-optical systems.

• Verification Collaboration: Work closely with the DV team to develop functional coverage models and debug complex issues within a UVM (Universal Verification Methodology) environment.

• Mentorship: Provide technical leadership to junior engineers and contribute to the evolution of internal design standards and IP libraries.

qualifications:

• Experience level: Experienced
• Minimum 8 years of experience
• Education: Bachelors (required)

 
skills:

• Circuit Board Design
• Embedded Software Design
• Product Design
• ASIC/FPGA/PLD
• PCB Design
• Verilog
• design verification
• Validation
• Image Processing
  
  
  Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.
  At Randstad, we welcome people of all abilities and want to ensure that our hiring and interview process meets the needs of all applicants. If you require a reasonable accommodation to make your application or interview experience a great one, please contact View email address on randstadusa.com.
  
  
  Pay offered to a successful candidate will be based on several factors including the candidate's education, work experience, work location, specific job duties, certifications, etc. In addition, Randstad offers a comprehensive benefits package, including: medical, prescription, dental, vision, AD&D, and life insurance offerings, short-term disability, and a 401K plan (all benefits are based on eligibility).
  
  
  This posting is open for thirty (30) days.