Photonics Nanofabrication Process Engineer

The RF and Integrated Photonics Group (Group 85) is committed to advancing technologies in the national interest by harnessing novel RF and photonic capabilities. The group’s work encompasses everything from foundational research into materials and components to the development of complete RF and photonics systems. Key application areas include classical and quantum sensing and computing systems, as well as laser, radar, communications, and electronic warfare technologies. Within the group, the integrated photonics area focuses on developing photonic integrated circuits (PICs) and active photonic devices for classical and quantum applications including: microwave photonics; ion trap quantum computing; quantum sensing and communication; advanced laser, modulator, photodetector and other device development; and non-linear photonic applications. These efforts are supported by state-of-the-art on-site fabrication tools, close partnerships with universities and industry, extensive test and measurement infrastructure, and daily collaboration with the broad array of engineers and scientists within Lincoln Laboratory. Together, the group drives innovative research to address critical challenges and advance national capabilities.

Job Description

The group seeks a highly motivated, detail-oriented, curious, and driven scientist or engineer to join our integrated photonics fabrication team. The successful candidate will join a close-knit, dynamic team pushing the forefront of photonic integrated circuit (PIC) platform and system development. The successful candidate will play a central role in developing PIC fabrication processes for monolithic and hybrid-integrated circuits for both classical and quantum applications. Work will focus on our 200 mm PIC fabrication platforms and will primarily be completed in our in-house Microelectronics Laboratory with support from a full team of process and equipment technicians and area engineers. Other hands-on process activities will be performed in our compound semiconductor and auxiliary fabrication spaces.

The role will include initiating and executing short-loop and full-flow fabrication runs; overseeing standard process runs to meet program needs and improve device performance, yield, and reliability; After a training period, responsibilities will include supporting our fabrication runs in the 200 mm Microelectronics Laboratory, monitoring in-line process metrology and performing a process integration role. Additionally, they will process experiments and completing independent tasks while working with a team of engineers and scientists across a range of skill and experience levels.

While some of the materials used for photonic circuits may be different from those typically used in CMOS, our fabrication leverages standard back end of line CMOS techniques including metal deposition, photolithography, and etch. We welcome applications from candidates both with and without direct experience in PIC device fab, Experience in Micro Electro Mechanical system (MEMS) fabrication is also relevant.

Qualifications

Required:
• Education: Ph.D. or M.S. in a field related to nanofabrication with at least 3 years of hands-on experience in micro/nanofabrication process engineering or process integration. Exemplary candidates with a B.S. and extensive on-the-job experience and demonstrated breadth and depth of fabrication expertise will also be considered.
• A demonstrated ability to develop and execute rigorous experimental plans
• Tool operation expertise and theoretical understanding in at least one of lithography, etch, thin films, metrology, and inspection.

Desired:
• Tool operation expertise and theoretical understanding across multiple of lithography, etch, thin films, metrology, and inspection
• Demonstrated skill in Scanning Electron Microscopy (SEM)
• Expertise across full device fabrication flows
• Experience with developing and executing standard process control
• Demonstrated process integration and 3D integration experience

• Prior experience in hybrid or heterogeneous multi-material integration (chemical mechanical polishing, surface preparation, chip-to-wafer or wafer-to-wafer bonding) of chiplets or wafers and novel material etch development and qualification is a plus.

Recent Graduate Hiring Range: $116,400-$140,000
Experienced Hiring Range: $116,400-$182,000

Disclaimer: MIT Lincoln Laboratory provides a typical hiring range as a good faith estimate of what we reasonably expect to offer for this position at the time of posting. The final salary offered to a selected candidate will depend on various factors, including—but not limited to—the scope and responsibilities of the role, the candidate’s experience, skills and education/training, internal equity considerations and applicable legal requirements. This range reflects base salary only and does not include additional forms of compensation or benefits.

At MIT Lincoln Laboratory, our exceptional career opportunities include many outstanding benefits to help you stay healthy, feel supported, and enjoy a fulfilling work-life balance. Benefits offered to employees include: 

• Comprehensive health, dental, and vision plans
• MIT-funded pension
• Matching 401K
• Paid leave (including vacation, sick, parental, military, etc.)
• Tuition reimbursement and continuing education programs
• Mentorship programs
• A range of work-life balance options
• ... and much more!

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Selected candidate will be subject to a pre-employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance.

MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.

Requisition ID:  43126