Application Engineer-Staff Engineer-18351

General Information Job Title Application Engineer-Staff Engineer-18351 Job ID 18351 City Austin State/Province Texas Date Posted 11-Aug-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Base Salary Range: $112000 - $168000 Descriptions & Requirements Job Description and Requirements We Are:Synopsys is the leader in engineering solutions from silicon to systems, powering the era of pervasive intelligence. Our technologies help drive innovation across chip design, verification, and IP integration, enabling breakthroughs from AI systems to autonomous vehicles. Join us to help accelerate the next generation of technology.You Are:You are a motivated Application Engineering professional with a solid foundation in ASIC SOC design and familiarity with high-speed protocols such as PCIe, SerDes and DDR. You bring hands-on experience in simulation, synthesis, and static timing analysis, along with strong analytical and problem-solving skills. You are excited to support customers as they integrate leading Interface IP into complex SoC designs.What You’ll Be Doing:Supporting Interface IP customers with integration across the SoC design flowAssisting with technical issue resolution and integration reviewsHelping with silicon and system bring-up, including debugging critical issuesCollaborating with internal teams to deliver solutions aligned to customer requirementsStaying current with industry standards, protocol developments, and application trendsTraveling occasionally to support customer engagementsThe Impact You Will Have:Supporting successful adoption and integration of Synopsys Interface IP productsHelping customers move development forward through effective technical supportContributing to customer success by helping resolve integration issues efficientlyBuilding experience with advanced IP and high-speed interface technologiesContributing to Synopsys’ reputation as a trusted customer partnerWhat You’ll Need:Bachelor’s or Master’s degree in Electrical Engineering or a related field, with a focus on ASIC SOC design5+ years of experience in design, verification, or application engineeringProficiency in RTL coding with Verilog and/or System VerilogExperience with high-speed protocols such as PCIe, Ethernet and DDRHands-on experience with simulation, synthesis, and static timing analysis (STA)Familiarity with UNIX environments and ASIC/SoC tape-out flowsKnowledge of CDC, RDC, lint, and DFT is a plusWho You Are:Curious, results-oriented, and able to manage multiple prioritiesStrong in verbal and written communication in EnglishEffective at collaborating across teamsAnalytical, thoughtful, and strong at solving technical problemsWilling to travel occasionally as neededThe Team You’ll Be A Part Of:This team helps customers integrate Interface IP into SoC designs, navigate design flows, debug critical issues, and support silicon bring-up. Working closely with customers and internal partners, the team contributes to successful deployment across a range of market segments.Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits. Details will be provided during the hiring process.#LI-DP1At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.