Principal FPGA Engineer

Overview Compensation: $203,000 - $243,000 / year Department: Avionics Location: Hawthorne, California Description: Venturi Astrolab, Inc. (Astrolab) is pioneering new ways to explore and operate on distant planetary bodies. We are singularly focused on designing, building, and operating a fleet of multi-purpose commercial planetary rovers to extend and enhance humanity’s presence in the solar system. We are seeking motivated, creative, and exceptional people to join our world-class team. The Avionics team is responsible for all aspects of the electrical systems and hardware on Astrolab’s electric rover vehicles and ground support equipment. We work collaboratively with all teams at Astrolab to provide exceptionally capable and reliable electronics to serve our missions. The Principal FPGA Engineer will participate in all aspects of the development and test of avionics FPGA RTL designs for Astrolab rovers. The ideal candidate has 15+ years of experience in FPGA firmware development including RTL design, simulations, analysis, verification, and HW testing. This position will report to the Director of Avionics Engineering and will be based in our Hawthorne, CA office. What you'll do Own FPGA RTL development from blank sheet to flight Develop FPGA logical architecture and requirements in collaboration with other engineering disciplines, including defining HW/SW interfaces between fabric logic and processing subsystems Develop RTL code for Microsemi, Xilinx, or other FPGA or SoC devices in either SystemVerilog or VHDL Perform design verification including simulations, test benches, timing analysis, and hardware testing Lead design reviews, demonstrate requirement traceability, and create documentation for FPGA operation and interfacing with other SW and FPGA systems Develop and participate in test campaigns ranging from unit-level manual tests, unit automated tests, and system-level tests What You'll Bring Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent 15+ years of experience in FPGA RTL architecture, development, verification, deployment, and maintenance Skilled at SystemVerilog or VHDL Skilled in at least 1 scripting language (TCL, shell, Python, etc) Skilled in verification techniques, and timing/stability analysis Proficiency in understanding PCB designs and reading schematics Proficiency in understanding embedded software Proficiency with AXI protocols (at least AXI4 family) Knowledge of common bus and memory interfaces (DDR4, SPI, I2C, UART, etc) Demonstrated success working in a dynamic environment Additional Responsibilities Design for space environments including radiation impacts and mitigations What We Offer Join a team of best-in-class engineers building the foundation of planetary surface exploration Equity ownership in the company Comprehensive health benefits, including medical, dental, vision, and mental health support 401(k) plan with company match Flexible PTO and parental leave Home office set up reimbursement Fully flexible and remote friendly work environment Weekly lunch stipend, plus complimentary snacks and beverages on-site Once a month social hour on-site with food and drinks #J-18808-Ljbffr Astrolab