Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

SoC UPF Methodology Engineer

Apple Inc.

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting‑edge technology and capabilities for low‑power chip design. Your work will fuel Apple’s next-generation chips! You’ll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you’ll refine our existing UPF framework and ensure its seamless integration and rigorous verification across our mobile products. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign‑off and power intent‑UPF implementation & verification on mobile SOCs. Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support state‑of‑the‑art mobile SOCs. Enhancing power intent coverage via advanced static and dynamic verification techniques. Developing tailored UPF solutions to align with unique project requirements. Overseeing UPF deployment and sign‑off for frontend (FE) and place‑and‑route (P&R) stages. Conducting thorough power intent assessments on custom circuitry. Partnering with design and verification teams to troubleshoot and fix UPF‑related workflow challenges. Integrating AI/ML technologies to optimize UPF processes and methodologies. Minimum Qualifications A minimum of a bachelor’s degree in a relevant field and a minimum of 3 years of relevant industry experience. Preferred Qualifications Expertise in UPF implementation and verification. Proficiency in scripting with languages like Python and Tcl. Understanding of CMOS power design principles. Experience applying AI/ML to coding and workflow optimization. Knowledge of multi‑voltage static verification tools (e.g., VSILP/VCLP, CLP). Familiarity with the complete RTL‑to‑GDSII design flow. Strong communication abilities for effective collaboration across multidisciplinary teams. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr Apple Inc.

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the SoC UPF Methodology Engineer in Beaverton, OR vacancy
  • A leading technology company is looking for a Power UPF Engineer to enhance Unified Power Format (UPF) methodologies and support advanced mobile SOC design. The ideal candidate will have a relevant bachelor's degree and at least 3 years of industry experience, with expertise... 
    Suggested

    Apple Inc.

    Beaverton, OR
    1 day ago
  • $141.91k - $200.34k

     ...within Intel Foundry as part of the X-Chip SoC Full-Chip Integration team. This team...  ...contribute to the development of physical design methodologies and drive full-chip SoC integration for...  ...:Master's degree in electrical engineering or related field with minimum of 5 years... 
    Suggested
    Full time
    Work experience placement
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    3 days ago
  • $220.92k - $311.89k

    Job Details:Job Description: Intel’s AI SoC organization is driving innovation in next...  ...cloud. As a Senior Formal Verification Engineer, you will play a critical role in...  ...functional verification infrastructure and methodology.Apply learnings from post-silicon validation... 
    Suggested
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $141.91k - $200.34k

     ...groundbreaking advancements in the industry.Position OverviewAs a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's...  ..., including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning ORMaster's degree in... 
    Suggested
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    9 hours ago
  • $102.1k - $202.2k

     ...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s...  ...infrastructure. We are looking for a SoC HW (Digital, Analog or PnP) Validation Engineer...  ...requirements, environments, tools, and methodologies including debug board and hardware/... 
    Suggested
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Hillsboro, OR
    5 hours ago
  • $220.92k - $311.89k

     ...seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification...  ...scalable and reusable verification methodologies that ensure first-pass silicon success...  ...Familiarity with power intent verification (UPF) and security verification techniques.... 
    Full time
    Work experience placement
    Local area
    Immediate start
    Worldwide
    Shift work
    Night shift

    Intel

    Hillsboro, OR
    2 days ago
  •  ...Design Verification Engineer At Apple, we work every single day to...  ...not limited to: establishing DV methodology, test-plan development,...  ...first silicon for part of the SoC / IP and are encouraged to develop...  ...Experience with power-aware (UPF) or similar verification methodology... 
    Work experience placement

    Apple

    Beaverton, OR
    4 days ago
  • A leading technology company in Beaverton is seeking a highly skilled ASIC Design Engineer to develop custom SoCs. Responsibilities include design, implementation, verification of ASICs using SystemVerilog, and collaboration with hardware/software teams. The ideal candidate... 

    Apple Inc.

    Beaverton, OR
    1 day ago
  • Apple Inc. is seeking an experienced Analog Layout Engineer in Beaverton, Oregon. This role involves developing layouts for analog mixed-signal circuits and operating within SOC flows. Candidates should possess over 10 years of expertise in analog design, with proficiency... 

    Apple Inc.

    Beaverton, OR
    1 day ago
  •  ...SoC Physical Design Engineer, STA/Timing Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products...  ...for project tapeout. - Create and maintain scripts and methodologies for analysis and runs. - Create documentation and help with... 

    Apple

    Beaverton, OR
    9 hours ago
  • Analog Mixed Signal IP Integration Engineer At Apple, we work every single...  ...of 3rd party IP in the SOCs developed by Apple. Your job is...  ...their design and verification methodology Review IP quality on incoming...  ...timing analysis, CDC, RDC, and UPF Familiarity with SOC design flow... 

    Apple Inc.

    Beaverton, OR
    1 day ago
  • Description Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA Detailed analysis across partitions to understand optimization opportunities Cross functional collaboration... 

    Apple Inc.

    Beaverton, OR
    2 days ago
  • Apple Inc. in Beaverton, Oregon, is seeking a talented engineer to work on VLSI digital designs. You will generate new ideas and methodologies while collaborating with various teams to improve optimization and implementation strategies. The ideal candidate will have a Bachelor... 

    Apple Inc.

    Beaverton, OR
    2 days ago
  •  ...power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and...  ...Description As a formal verification engineer working the complete formal verification...  ...Architecting correct-by-construction design methodologies for improved formal verification... 

    Apple

    Beaverton, OR
    1 day ago
  • $141.91k - $269.1k

     ...world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in...  ...-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of...  ...) strategy integrationEnable scalable SoC assembly flows for multi-block and multi... 
    Full time
    Local area
    Immediate start
    Worldwide
    Shift work

    Intel

    Hillsboro, OR
    4 days ago
  • Apple’s Silicon Engineering team is looking for a highly skilled and motivated ASIC Design...  ...In this role, you will develop custom SoCs that drive the performance and efficiency...  ...experience with ASIC design tools and methodologies is essential. Technical Skills: Proficiency... 

    Apple Inc.

    Beaverton, OR
    1 day ago
  • $119.48k - $163.2k

     ...Twitter (X).Employer: Analog Devices, Inc. Job Title:Senior Engineer Design Verification EngineeringJob Requisition: 1010.1272.5 /...  ...state-of-the-art models of mixed-signal ICs. Apply verification methodologies to reach verification goals, including creating System... 
    Permanent employment
    Full time
    Work experience placement
    Work at office
    Remote work
    Work from home
    Day shift
    2 days per week

    Analog Devices

    Beaverton, OR
    4 days ago
  • $119.8k - $234.7k

     ...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s...  ...improve verification efficiency through methodologies or tools.Apply industry leading...  ...verifying PCIe designs at the IP, subsystem or SOC level.Experience driving IP verification... 
    Ongoing contract
    Permanent employment
    Internship
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Hillsboro, OR
    2 days ago
  • $142.8k - $274.8k

     ...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's...  .... The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking passionate...  ...* Apply Agile development methodologies including code reviews, sprint planning,... 
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide

    Microsoft Corporation

    Hillsboro, OR
    2 days ago
  • $90k - $115k

     ...Manufacturing/Process Engineer (CNC Machining)Starting base salary range of $90,000 to $115,000 (DOE)At Leupold & Stevens our passion...  ...flow, lean manufacturing, quality control and ergonomics methodologies and applications.Working knowledge of Geometric Dimensioning... 
    Contract work
    Work at office

    Leupold

    Beaverton, OR
    3 days ago
  • Working for Micro Systems Engineering, Inc. (MSEI) means joining an elite team to work on some of the most exciting challenges in medical...  ...manufacturing (SMT preferred).Experience with statistical methodologies (such as Design of Experiments) for problem solving and optimization... 
    Full time
    Work at office
    Local area
    Worldwide

    Biotronik

    Lake Oswego, OR
    2 days ago
  • $94.1k - $123.48k

     ...position are day shift.Job Description:The Principal Industrial Engineer within the Service and Repair organization is responsible for...  ...excellence through Industrial Engineering fundamentals, Lean methodologies, data analysis, and structured project management. This role... 
    Full time
    Live in
    Local area
    Remote work
    Flexible hours
    Shift work
    Day shift

    FormFactor

    Beaverton, OR
    4 days ago
  • $190.61k - $269.1k

     ...Chip Development team, within Intel's Central Engineering Group, is responsible for delivering...  ...silicon manufacturing and validation teams, and SOC partners.• Drive design reviews and ensure adherence to design methodologies.• Facilitate design development and convergence... 
    Full time
    Work at office
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $121.68k - $174.44k

     ...LinkedIn and X.Employer: Analog Devices, Inc. Job Title: Senior Engineer, Digital Design EngineeringJob Requisition: 1010.1270.4 / R26...  ...section):Demonstrated Expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or... 
    Permanent employment
    Full time
    Work at office
    Remote work
    Work from home
    Day shift
    2 days per week

    Analog Devices

    Beaverton, OR
    2 days ago
  • $105.65k - $200.34k

     ...and experienced Post-Silicon Validation Engineer to join the team and play a critical role...  ...to the validation of complex CPU/SOC architectures and ensuring products meet...  ...implement, and debug validation tests and methodologies for post-silicon environmentsCollaborate... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    1 day ago
  • Mixed-Signal Behavioral Modeling Engineer At Apple, we work every single day to craft products...  ...systems used in Apple’s world-leading SoCs, and shape the cutting edge of the...  ...experts in this domain to enhance modeling methodology, improve functional coverage, optimize modeling... 

    Apple Inc.

    Beaverton, OR
    5 days ago
  •  ...StatesLocation: Beaverton, ORTektronix is seeking a Mechanical Engineer to join our Product Line Engineering team, supporting the...  ...design and analysis experience.Experience using CFD tools and methodologies.Ability to develop thermal models from CAD concepts and correlate... 
    Work at office
    Local area

    Tektronix

    Beaverton, OR
    1 day ago
  • $119.8k - $234.7k

     ...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's...  ..., the AI Silicon Engineering (AISiE) SoC Design Verification team is instrumental...  ...efficientverificationflows. ~ Apply Agile methodologies, including participation in code reviews... 
    Ongoing contract
    Permanent employment
    Work at office
    Local area

    Microsoft Corporation

    Hillsboro, OR
    5 days ago
  •  ...management, material and product development, manufacturing engineering and product integrity.  You will serve as the regional connection...  ..., textile manufacturing processes, quality systems, testing methodology, inspection strategy, root cause analysis and corrective... 
    Full time
    Casual work
    Local area

    Nike

    Beaverton, OR
    16 days ago
  • $136k - $218.5k

     ...now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...  ...processes for NVIDIA's GPUs, CPUs, LPUs, and SoCs at block level, cluster level, and full...  ...convergence flows in collaboration with methodology teams.What we need to see:BS (or... 
    Full time

    Nvidia

    Hillsboro, OR
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to SoC UPF Methodology Engineer. Be the first to apply!