Senior ASIC Power Engineer: Power Optimization & Signoff
Anysilicon
Meta is seeking an experienced ASIC Engineer specializing in power to join its EDA Infrastructure team. This role focuses on developing and maintaining power analysis and optimization flows for custom silicon designs, ensuring accurate power modeling and consumption reduction. You will collaborate across RTL, physical design and verification to drive power closure on complex ASIC designs, build automation, and evaluate new EDA tools to improve signoff accuracy.
#J-18808-Ljbffr$136k - $218.5k
We’re looking for a Senior Power Architecture & Optimization Engineer to push the limits of energy efficiency using advanced analytics and AI, including LLMs... ...closely with Architects, Performance, Software, ASIC Design, and Physical Design teams to interpret power...SeniorFull time$136k - $218.5k
We are now looking for a Senior ASIC Power Engineer!NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact...SeniorFull time- ...NVIDIA in Austin, TX is seeking a Senior ASIC Power Engineer to design hardware accelerators and processors for mobile, embedded, and data center platforms. You will develop power-aware RTL and drive power reductions across products, delivering verified, high-performance...Senior
- ...NVIDIA, 11001 Lakeline Blvd., Austin, TX 78717 Job Description: NVIDIA is seeking a Senior ASIC Power Engineer to design hardware accelerators and processors for next-generation mobile, embedded, and datacenter platforms. This role offers the chance to significantly...Senior
- ...Apple Inc. is seeking a Signoff Engineer in the Silicon Technologies group to design and verify advanced SoC... ...will work on gate and transistor level analyses, power and signal EM analysis, and AI/ML-driven signoff optimization. The role involves collaboration with...Senior
- ...Apple seeks a Cellular ASIC Design Engineer to help develop high-performance, power-efficient cellular chips and SoCs in Austin, TX. You will drive design flows, co-optimization, and DFT improvements across the full ASIC cycle. Proficiency in Python, C/C++, TCL, and EDA...
- ...seeks a Sr Staff Physical Design PPA Engineer to lead power, performance, and area optimization for premium IPs at the SARC/ACL... ...PD flows from synthesis through signoff, collaborating with RTL/SOC teams... ...requires extensive experience in ASIC/SoC design, strong scripting...Senior
- ...Technologies, Inc. in Austin, Texas, is seeking a Senior Staff Physical Design Engineer to define, model, and implement IP/SoC for high-performance, low-power products. You will collaborate with... ...role requires extensive experience in ASIC design/verification, scripting, and...Senior
$168k - $264.5k
...are seeking an innovative Senior STA Signoff Methodology Engineer to help drive sign-off strategies... ...is a broad opportunity to optimize performance, yield, and... ..., and timing and power optimization.Perform extensive... ...8 years of experience in ASIC design and timing.Solid understanding...SeniorFull time- ...Meta is seeking an experienced ASIC Engineer specializing in power to join its EDA Infrastructure team. This... ...and maintaining power analysis and optimization flows for custom silicon designs,... ...automation frameworks to improve power signoff accuracy and turnaround time....
$168k - $264.5k
...world.NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and... ...to accomplish your tasksImplement and optimize automated verification flows to improve... ...Verdi or equivalent)Background in UPF power verification is a plusExperience in netlist...SeniorFull time$136k - $218.5k
...lasting impact on the world.NVIDIA is seeking a Senior ASIC Compose Verification Infrastructure and Tools Engineer to advance the systems that qualify, integrate,... ...discussions to guide priorities, forecast risk, and optimize the systems we operate.Collaborate with ASIC...SeniorFull time$120k - $195k
...intersection of plant operations, technical engineering, and investment decision-making—... ...North America is seeking a Gas Generation Power Senior Engineer Subject Matter Expert (SME)... ...construction, operations, and asset optimization, and plays a critical role in informing...SeniorContract workTemporary workWork at officeFlexible hours3 days per week$159.2k - $215.3k
...change the world.We are seeking a Senior SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role... ...next generation machine learning ASICs. As a senior member of our hardware... ....- Conduct SI/PI analysis to optimize PCB layouts, minimizing losses and...SeniorFlexible hours- ...Sumitomo Electric Device Innovations U.S.A., Inc. seeks a skilled RF Design Engineer to join the Dallas lab. You will design and optimize Doherty Power Amplifiers for advanced wireless applications, conducting development, testing, and validation of high-performance RF...Senior
$224k - $356.5k
...accelerated computing and powering the next era of artificial... ...problems. We are looking for a Senior System Software Engineer to join NVIDIA’s GPU... ...mechanisms that dynamically optimize GPU performance, power,... ...distributed architecture, ASIC, firmware, driver, validation...SeniorFull timeRemote work- ...Cisco Systems, Inc. seeks a Senior ASIC post-silicon DFT Lead to work across post-silicon validation, reliability... ...through production, collaborate with multiple engineering teams, and leverage VCS/P1687 knowledge to optimize validation and yield in a fast-paced environment...Senior
- ...WORLD. At AMD, we believe technology has the power to solve the world’s most important... ...advance your career.THE ROLE:Technical, hands-on engineer responsible for Datacenter Server SOC power management feature optimization, power characterization and Product definition...
- ...Meta is seeking an experienced ASIC Engineer to join the Infrastructure Silicon team, focusing on high-performance, power-efficient ASICs for AI and immersive computing. You... ...collaborate with foundry partners and PD teams to optimize silicon technologies and advance product...Senior
- ...Qualcomm Technologies, Inc. is seeking an experienced ASIC Physical Design professional to drive synthesis, CTS, and overall physical... ...convergence. Responsibilities include updating flows for optimal power, performance, and area and leading semi-custom design...Senior
$129.5k - $194.3k
...Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group CPU... ...Qualcomm Business Units. Job Overview Power analysis on a project involved in the development... ...physical design teams to measure and optimize power. Tabulate metrics results for...SeniorWork experience placementWork from home- ...Positron AI in Austin, TX is seeking a Senior Mid-End ASIC Engineer to own synthesis, timing convergence, and RTL-to-netlist quality for our AI... ...current and future ASIC generations, drive timing closure, and optimize QoR using Cadence Genus or Design Compiler. #J-18808-...Senior
- ...NVIDIA is seeking an experienced ASIC Floorplan Engineer in Austin, TX to design and implement cutting-edge SOCs... ...collaborate with cross-functional teams to optimize floorplans, ensuring optimal cost, area, performance, and power across product lines. The ideal candidate...Senior
- ...Ericsson is seeking an ASIC Design Verification Engineer in Austin, TX, to own full verification across IP/ASIC/SoC with hands-on SystemVerilog/UVM. You'll design testbenches from the ground up, debug RTL, and verify blocks to chip level while coordinating with hardware...Senior
$136k - $218.5k
...world.We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team.... ...constraints, and drive timing and power convergence as well as implement ECOs.... ...analysis.Experience in physical design and optimization e.g., synthesis, placement, routing,...SeniorFull time- ...AI inference performance and efficiency. We are seeking a Senior Mid-End ASIC Engineer to take charge of synthesis, timing convergence, and... ...and timing budgets. Drive logical timing closure and optimization across multiple parameters. Perform root-cause analysis...Senior
$136k - $218.5k
...work, to amplify human inventiveness and intelligence.The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at NVIDIA working on a system-level IP...SeniorFull time- ...Qualcomm Technologies, Inc. is seeking a CPU Power Engineer to lead power analysis and optimization for CPUSS development. You will collaborate with RTL, Synthesis, and physical design teams to measure and improve multi-core CPU power. Requirements include 3+ years in...
$136k - $218.5k
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for... ...you’ll be doing:Be responsible for the verification of ASIC design, architecture, golden models and micro-architecture...SeniorFull time$136k - $218.5k
...clocks group is looking for a top-notch ASIC engineer to join the team. The Team is... ...architectural/design/physical constraints.Improve Power, Performance, and Area (PPA) of... ...across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate...SeniorFull timeWork experience placement
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