Design Verification Engineer

Change the world. Love your job. We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing product line that develops cutting edge Shunt and Hall based mixed signal current sensing ICs. As a key member of our team, you will play a vital role in all phases of IC development, from architectural development, design, DV, tapeout and bring-up. This position offers a unique opportunity to develop expertise in both digital and mixed-signal domains. Job Responsibilities: Design & Implementation: Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis. Verification: Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers. Test Development: Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments. Collaboration & Problem Solving: Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success. Coverage & Reporting: Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively. Continuous Improvement and Automation: Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation. #J-18808-Ljbffr