Senior FPGA Design Engineer

• Design and simulate FPGA/modem systems
• Work with Ultrascale+ and Versal platforms
• Develop designs using VHDL and SystemVerilog
• Implement and work with high-speed SerDes
• Develop and maintain scripting solutions using Python, Perl, Bash, Tcl, and related tools
• Work with Ethernet, Interlaken, PCIe, SPI, I2C, UART, and other communication interfaces

Requirements

• 10+ years of experience
• FPGA/modem design
• Experience with Ultrascale+ and Versal
• VHDL and SystemVerilog
• Design and simulation
• High-speed SerDes
• Solid scripting skills in Python, Perl, Bash, Tcl, etc.
• Communication interfaces such as Ethernet, Interlaken, PCIe, SPI, I2C, UART, etc.
• Active government clearance (nice to have)
• Software-defined radio/modem design background (nice to have)
• Some PetaLinux background (nice to have)
• RF design background (nice to have)
• Encryption experience (nice to have)

Demonstrates extensive experience in FPGA and modem design, utilizing VHDL and SystemVerilog for simulation and implementation. Proficient in high-speed SerDes and various communication interfaces, with strong scripting capabilities in Python, Perl, Bash, and Tcl.

Highest-signal resume keywords

• FPGA/Modem Design
• VHDL
• SystemVerilog
• High-Speed SerDes
• Communication Interfaces

Hard Skills

• FPGA/Modem Design
• VHDL
• SystemVerilog
• High-Speed SerDes
• Python
• Perl
• Bash
• Tcl
• Ethernet
• PCIe

Certifications & Qualifications

• Active Government Clearance

Industry Keywords

• Software-Defined Radio
• PetaLinux
• RF Design
• Encryption

Tools & Technologies

• Ultrascale+
• Versal
• Interlaken
• SPI
• I2C
• UART