DFT, Principal Engineer

General Information Job Title DFT, Principal Engineer Job ID 19017 City Austin State/Province Texas Date Posted 28-Sep-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Base Salary Range: $170000 - $255000 Descriptions & Requirements Job Description and Requirements We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou are a hands-on DFT expert who has driven test architecture and implementation for complex SoCs that tape out and succeed in production, not just in reviews. You understand how decisions made around RTL freeze impact coverage, yield, and test cost at volume, and you can confidently define the right strategy across scan/ATPG, MBIST/LBIST, and broader test hooks needed for bring-up and failure analysis.You do not just run tools. You understand the engineering tradeoffs between test time, area/power overhead, and coverage, and you can explain and defend why a specific approach is right for a given subsystem and product context. Operating with high autonomy, you own technically complex deliverables end-to-end and influence outcomes through deep expertise and strong cross-functional collaboration. When you spot untestable logic or weak test hooks, you propose practical fixes that teams actually adopt. You are comfortable leading technical discussions with architects and pushing back when decisions introduce coverage gaps or yield risk, because you have seen what happens when those issues reach production.What You'll Be DoingOwn DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, working directly with customer and internal design teamsDefine and execute test strategies across scan insertion and ATPG, memory BIST, logic BIST, and analog/PHY test considerations to meet coverage, quality, yield, and cost targetsDrive DFT signoff readiness by identifying testability risks early, proposing design changes, and ensuring closure across the RTL-to-GDS flowDevelop and institutionalize reusable DFT methodologies, checklists, and guidelines using Synopsys EDA tools to solve real customer problems on active service projectsPartner with silicon validation and test engineering teams on post-silicon debug, failure analysis triage, and pattern refinement to improve production outcomesCollaborate closely with RTL design, functional verification, physical design, timing, and power teams to ensure testability is designed in from architecture through signoffProvide technical guidance to peers through design reviews, integration/debug support, and best-practice sharingThe Impact You Will HaveEnable first-pass silicon success by surfacing and resolving DFT issues before tapeoutImprove test coverage and yield through robust scan/ATPG and BIST strategies aligned to product constraintsReduce production test time and cost for SoCs in high-performance computing, automotive, and aerospace domainsCreate reusable DFT methodologies that scale across multiple programs and customer engagementsStrengthen customer confidence by delivering DFT solutions that work in production, not just in simulationInfluence Synopsys tools and IP direction by feeding back real project learnings and customer pain pointsAccelerate tapeout schedules by catching testability gaps early and proposing fixes teams can implement without reworkWhat You'll NeedBachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related fieldTypically 10+ years of hands-on SoC DFT experience with proven depth in scan/ATPG, memory BIST, logic BIST, and analog test considerationsStrong understanding of the end-to-end SoC design flow from microarchitecture through RTL, verification, synthesis, timing/physical implementation, and signoffDemonstrated experience owning DFT implementation for complex SoCs that have taped out and gone to productionStrong working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, and BIST Architect is a plusProven ability to work cross-functionally to resolve testability issues and drive closure under schedule constraintsPost-silicon debug experience and collaboration with test engineering teams to refine production test programs is a plusWho You AreYou can quickly identify untestable logic or weak test hooks and propose practical fixes that teams will adoptYou are comfortable leading technical discussions with architects and pushing back when decisions introduce coverage gaps or yield riskYou operate with high ownership and ambiguity tolerance, able to define a path forward with incomplete informationYou share expertise through hands-on collaboration, reviews, and problem-solving, not through org authorityYou communicate clearly, translating DFT tradeoffs into schedule/cost/yield impact for stakeholdersYou stay current with evolving DFT techniques because each new tapeout brings different constraintsThe Team You'll Be Part OfYou will join the Systems Solutions Group (SSG), a team that delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to help leading-edge customers complete their most challenging SoC design projects. The work spans from sub-blocks to full turnkey end-to-end SoCs for customers ranging from startups to industry leaders, commercial companies, and government agencies developing SoCs for high-performance computing, automotive, aerospace and defense, and more. This is a customer-facing role where the DFT solutions you build directly enable customer tapeouts and production success.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.