Hybrid TPM Lead for Semiconductor IC & Hardware
Powerlattice Technologies Inc.
PowerLattice is seeking an experienced Technical Program Management Lead to drive execution of silicon IC and hardware development programs from concept through production. This role partners with engineering, operations, supply chain, and external vendors to ensure high-quality products meet aggressive schedules. The position is hybrid with 3 onsite days per week at Vancouver, WA or Chandler, AZ; remote flexibility may be considered for exceptional candidates in Silicon Valley, CA. #J-18808-Ljbffr Powerlattice Technologies Inc.
Vacancy posted 4 days ago
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