CPU Timing Engineer: Automation & STA Signoff
QUALCOMM, Inc.
Qualcomm Technologies, Inc. is seeking a CPU Physical Design Timing Engineer to define, develop and drive CPU timing closure for Oryon CPU Cores. You will collaborate with RTL teams to meet aggressive power, area and performance targets using industry standard tools. You will script and automate STA signoff workflows with TCL/Perl/Python, run PrimeTime/Tempus, and investigate timing miscorrelations across PVT conditions, contributing to multi-project PPA goals and professional growth in a #J-18808-Ljbffr QUALCOMM, Inc.
- Qualcomm Technologies, Inc. in Santa Clara seeks a CPU Physical Design Timing Engineer to define, develop, and drive CPU timing closure for Oryon CPU... ...performance goals using industry standard tools. You will script STA workflows, collaborate with central timing tech teams,...Suggested
$168k - $264.5k
...We are seeking an innovative Senior STA Signoff Methodology Engineer to help drive sign-off strategies for... ...modeling, insightful analysis, and automation. This work will influence the entire... ...impact of advanced technologies on chip timing.Develop STA and PNR flows and...SuggestedFull time- ...is seeking an experienced ASIC physical design engineer in Sunnyvale, CA. You will drive timing closure, signoff readiness, and PPA optimization for advanced-node... ...chip levels. You will develop methodologies and automation using TCL, Python, or Pandas, perform static timing...Suggested
$164.47k - $269.1k
Job Details:Job Description: Shape the Future of Computing at IntelIntel is seeking an experienced Senior Static Timing Analysis (STA) Engineer to help drive the development of next-generation semiconductor products. In this role, you will play a critical part in delivering...SuggestedFull timeLocal areaImmediate startShift work- ...Responsible for developing, improving, and maintaining the CDC and RDC sign-offs for CPU designs Working with RTL and DV teams to recommend System Verilog assertions needed to support CDC/RDC/STA constraints and assumptions Highlighting to the RTL team any CDC/RDC issues...Suggested
- A technology corporation is seeking a skilled engineer to enhance CPU design and develop automation solutions. The ideal candidate will have extensive experience in RTL design and CPU microarchitecture, coupled with advanced skills in scripting, particularly in Python....
- ...compliance, and third-party risk lifecycle management. You will automate control monitoring and streamline evidence collection while partnering... ...with risk owners to drive remediation. The role focuses on real-time audit readiness and scalable governance platforms. The ideal...
- ...Principal Design Verification Engineer to lead verification of CPU-subsystem power-management... ...quality, resiliency, and signoff readiness. This is a... ...Contribute reusable methodology, automation, and verification... ...and retirement plans, paid time off, and more! Additional...Immediate start
- ...Sunnyvale, CA is seeking an experienced Timing Signoff Specialist to drive PrimeTime... ...architectures. You will own beta programs, mentor engineers, and coordinate with R&D to validate... ...demands deep PrimeTime knowledge, Tcl/Python automation, and a track record of solving complex...
- Tensordyne, a Sunnyvale-based AI system solutions company, is seeking a senior ASIC STA lead to drive frontend physical design and timing closure across full-chip and block-level workstreams. You will collaborate with a global team, develop scalable STA workflows, and optimize...
- Apple Inc. in Santa Clara, CA is seeking a Senior CPU Implementation Silicon Correlation Engineer to validate and correlate pre-silicon design targets with... .... You will obtain silicon measurement data, analyze timing runs, and work with post-silicon teams to assess ROI...
- Synopsys, Inc. in Sunnyvale, CA, seeks an experienced Timing Signoff expert to drive PrimeTime deployments, including HyperGrid and AI-assisted... ...from kickoff to production readiness. You will mentor engineers, influence PrimeTime roadmaps, and craft deployment guides and...
$150.4k - $277.6k
...groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low... ...architecture and RTL for world-class CPU power management solutions.... ...design to target power, performance, area and timing goals Verification - support the verification...Relocation$167.1k - $250.7k
...General Summary We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role,... ...debugging tools. Knowledge of logic design principles along with timing and power implications. Preferred Qualifications MS...Work experience placementWork from home- SiTime is seeking a Director of Test Engineering to lead a global team and drive production test solutions for MEMS timing products. The role combines technical leadership... ...systems, defining roadmaps, and leveraging automation and AI to improve workflows and product introductions...
$231.44k - $282.88k
...place, one processor at a time. Are you ready? To... ...Principal Design Verification Engineer to lead verification... ...in high-performance CPU and SoC platforms. This... ...subsystem integration and signoff. Define verification... ..., scripting, and automation skills in Python or similar...Work experience placement$198.7k - $298.1k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > CPU EngineeringGeneral Summary:We are hiring talented engineers for RISCV... ...understanding of logic design principles, including timing and power implicationsPreferred QualificationsMaster’s...Work experience placementWork from home$168k - $264.5k
We are now looking for a Senior Circuit Timing Engineer!NVIDIA stands at the intersection of hardware... ...solutions.Drive timing analysis and signoff of custom circuit macros (digital, semi-... ...timing of custom circuit designs using STA tools including Nanotime, PrimeTime, Tempus...Full timeWorldwideShift work$150.4k - $277.6k
...CPU Physical Electrical Analysis Engineer Santa Clara, California, United States Hardware Description... ...with PNR design implementation and STA Preferred Qualifications Knowledge... ...pipelines Experience in TCL-based automation with PNR & STA tools Familiarity...Relocation$125.7k - $203.1k
....Meet The TeamThe Cisco Wireless Test & Automation team ensures the quality, reliability, and... ....Your ImpactAs a QA / Automation Engineer, you will contribute to validating Cisco... ...employment with Cisco for defined periods of time.U.S. employees are eligible for paid time...Full timeTemporary workWork experience placementLocal areaFlexible hours- NVIDIA in California is seeking a Senior Software Triage Engineer to join our autonomous driving team and help ensure safety and reliability... ...issues across in-car and digital test environments. You’ll automate critical metrics, drive triage quality, and own root-cause...
- ...Technologies, Inc. in Santa Clara is seeking a senior hardware/CPU engineering specialist to help reimagine silicon and deliver high-... ...advanced CPU flows, and work with EDA tools to optimize power, timing, and area. The role requires 8+ years in hardware or software...
$167.1k - $250.7k
...will discover jobs that meet your requirements(Estimated time to complete: 2mins)## Job Description#### Job Posting... ...**Company:**Qualcomm Technologies, Inc.## **Job Area:**Engineering Group, Engineering Group CPU Engineering**General Summary:**As a Design Verification...Work experience placementWork from home$125.7k - $203.1k
...the world, working together in Engineering, IT, Supply Chain, Customer... ...shaping the future—one idea at a time. Your Impact As a Software... ...robust system-level test automation and diagnostic tools using Python... ...issues, optimize memory and CPU performance, and support production...Full timeTemporary workApprenticeshipWork experience placementLocal areaFlexible hours- CPU Implementation Silicon Correlation Engineer Santa Clara, California, United States Hardware As we continue to push... ...team Analyze pre‑silicon timing runs to comprehend margins and relate... ...custom or PnR block Experience with STA Experience running spice simulations...Relocation
$198.7k - $298.1k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group CPU EngineeringGeneral Summary:Our MissionWe are dedicated to transforming... ...PnR implementation, verification, power analysis, and STA.Proficient in TCL, Perl, and Python scripting.Experience...Work experience placementWork from home- ...place, one processor at a time. Are you ready? To... ...Staff Design Verification Engineer to drive verification of high-performance CPU core units. This is a... ...identified early, and signoff quality is achieved with... ...DV infrastructure and automation. What Success Looks Like...Immediate start
- ...place, one processor at a time. Are you ready? To... ...Staff Design Verification Engineer to drive verification of high-performance CPU core functionality,... ...verified thoroughly, and signoff quality is achieved with... ...reusable methodology, automation, and infrastructure that...Immediate start
- ...ll own the path from RTL to a timing-clean netlist. You'll close timing... ...teams. Run and sign off STA, including on-chip variation,... ...between RTL and netlist. Build automation that makes synthesis and... ...Experience with ECO flows and timing signoff methodology. Interest in AI...
- ...planning and execution for CPU frontend functionality... ..., bug triage, and signoff readiness. Apply the right... ...behaviors. Mentor engineers across the organization... ...scalable DV infrastructure, automation, and analysis workflows... ...retirement plans, paid time off, and additional...
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