Vice President of Engineering

A fast-growing AI company is building an agentic platform designed to transform digital verification for semiconductor teams. Its technology combines AI agents, RAG-based design collateral ingestion, workflow automation, and logic-aware analysis to help engineering teams accelerate verification planning, execution, debugging, root-cause analysis, and coverage closure. We are looking for a senior engineering leader with deep digital verification expertise who can bridge customer needs, product strategy, and engineering execution. This is a hands-on leadership role for someone who can work directly with semiconductor customers, shape product direction, and lead teams toward production-grade delivery. Key Responsibilities: Lead technical discovery with semiconductor customers to understand verification workflows, pain points, requirements, and adoption challenges. Translate customer feedback into product requirements, technical specifications, use cases, and roadmap priorities. Own engineering execution, architecture, delivery quality, and technical roadmap implementation. Define how the platform integrates into real verification environments, including simulation, formal, emulation, regression, debug, CI/CD, coverage, and existing EDA toolchains. Support customer demos, proof-of-concepts, pilot programs, and technical evaluations. Mentor engineering teams on verification methodologies, EDA workflows, customer requirements, and product usability. Review product workflows and technical outputs to ensure they are credible and aligned with real-world verification practices. Define proof-of-value metrics around areas such as debug time, root-cause analysis, verification planning, regression insight, and manual effort reduction. Build relationships with semiconductor customers and technical stakeholders across the US. Help shape product positioning against established EDA tools, internal automation workflows, and general-purpose AI platforms. Key Qualifications: 15+ years of experience across semiconductor, EDA, and digital verification environments. Deep expertise in digital verification workflows, methodologies, and tools across IP, subsystem, and SoC-level projects. Strong experience with areas such as coverage-driven verification, formal verification, emulation, verification IP, debug, regression analysis, coverage closure, and verification planning. Experience working directly with semiconductor customers, verification teams, EDA users, or senior engineering stakeholders. Proven ability to translate complex technical requirements into clear product direction and engineering priorities. Experience leading and mentoring engineering teams. Strong product judgment and the ability to distinguish between technically interesting ideas and solutions customers will actually adopt. Strong communication skills across senior customers, executives, product teams, and hands-on engineers. Strong US semiconductor industry network, ideally across the Bay Area, Austin, or another major semiconductor hub. Experience at or closely with semiconductor companies, EDA vendors, IP companies, or verification tool providers. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice #J-18808-Ljbffr