Senior SoC Physical Design Lead (High-Perf / Low-Power)
Apple Inc.
Apple Inc. in Austin, TX seeks a seasoned SoC Physical Design Engineer to lead PD efforts for high-performance, low-power designs. You will drive RTL-to-GDSII implementation, PnR, STA, and sign-off, while guiding design rules and methodologies with cross-functional teams. The role requires deep PD expertise, a track record of tapeouts, and the ability to meet tight schedules on large SOCs (>20M gates) at >1GHz. Join a collaborative, engineering-focused environment. #J-18808-Ljbffr Apple Inc.
Vacancy posted 8 hours ago
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