RTL Design Engineer

Job Description Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you’ll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel As a CPU Logic Design Engineer, you will play a critical role in shaping Intel’s next-generation, high-performance microprocessors. Leveraging your technical expertise, you will contribute to the design, development, and optimization of CPUs that drive innovative computing solutions across various industries. By developing cutting-edge logic designs and collaborating with a dynamic, cross-functional team, you will help Intel deliver world-class processors that meet the demands of modern computing applications, including energy-efficient performance and advanced functionality. Your work will directly impact Intel’s mission to create world-changing technology and enrich the lives of every person on earth. Key Responsibilities Develop logic design and register transfer level (RTL) coding for CPU components, such as cell libraries, functional units, and CPU IP blocks. Participate actively in defining architecture and microarchitecture features to optimize CPU performance, power, and area. Write RTL and employ strategies to meet power, performance, area, and timing goals while ensuring design integrity and readiness for physical implementation. Review and refine verification plans and tests to ensure correct implementation of design features. Resolve failing RTL tests and implement corrective measures to meet design specifications. Document microarchitectural specifications (MAS) for CPU features and ensure their alignment with project goals. Support SoC customers to achieve seamless integration of the CPU block into larger designs. Behavior Traits Demonstrated written and oral communication skills, particularly to an executive audience Skilled at presenting complex information in a simple form. Willingness to thrive in high stress, ambiguous environments, to climb very steep learning curves and rapidly distinguish what is important from what is not important. For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. What we need to see (Minimum Qualifications) The candidate must have a Bachelor’s Degree in Electrical or Computer Engineering or any relevant STEM related degree. 3+ months of experience in each the following areas (experience may be gained through coursework or Internship and MUST be included on your resume as coursework or project / internship experience): CPU Logic Design Computer Architecture and / or Microprocessors Digital design and /or RTL coding Verilog/System Verilog and/or VHDL Scripting languages (such as Python, Perl, TCL) How to Stand out (Preferred Qualifications) Master’s Degree or PhD in Electrical or Computer Engineering or related STEM degree and 1+ years’experience. Knowledge of energy-efficient and low-power logic design techniques, including optimization for high-frequency applications. Familiarity with software tools and methodologies used in RTL design, verification, and simulation. Experience in floating point units, branch prediction, cache design, RISC-V) Understanding of Intel Architecture ISA and system architecture, including x86 assembly language. Experience in high-speed circuit design and optimization for datapath circuits and arrays. Knowledge of circuit planning, timing convergence, and other advanced design techniques. Strong collaboration, communication, and problem-solving skills, with the ability to work effectively in a team environment. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: Shift Shift 1 (United States of America) Primary Location US, Texas, Austin Additional Locations US, Arizona, Phoenix, US, Oregon, Hillsboro Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $91,150.00-172,860.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. #J-18808-Ljbffr Intel Corporation