Senior Director, Program Enablement & Operations (Hardware Engineering)

About the Role

Altera is undergoing a high‑velocity transformation to re‑establish leadership in the FPGA market. At the center of this transformation is execution excellence. We are seeking a Senior Director of Program Enablement & Operations to serve as the operational nerve center of Hardware Engineering, owning end‑to‑end program execution across all silicon programs, from concept through production. This leader will drive execution rigor, operational scale, and cross‑functional alignment across the largest and one of the most critical organizations in Altera, spanning architecture, silicon / IP development, validation, boards, and packaging. This is a high‑impact, high‑visibility leadership role working directly with executive staff, responsible for ensuring that ambitious product and roadmap commitments translate into predictable, high‑quality delivery.

Why This Role Matters

This is not a traditional program management role. This role defines how execution happens at Altera. You will shape the systems, rhythms, and culture that determine whether we meet our commitments, and ultimately whether we win in the market. If you thrive in environments where speed, complexity, and impact intersect, this role puts you at the center of it.

What You Will Do

1. Own End‑To‑End Program Execution: Lead execution across all major silicon programs—from planning, architecture alignment, and design through bring‑up, validation, and production. Ensure tight integration across pre‑silicon and post‑silicon phases, including boards and package development. Drive milestone definition, exit criteria, and execution discipline across all programs.
2. Lead Program Management Organization: Manage and develop a team of ~6 senior program leaders responsible for key product lines and initiatives. Establish a high‑performance culture of accountability, transparency, and delivery excellence. Elevate program management from tracking to decision‑driving and risk‑owning leadership.
3. Drive Operational Excellence at Scale: Build and run the operating system of Hardware Engineering—program governance frameworks, execution dashboards and KPIs, resource and dependency management, risk identification and mitigation systems. Identify and implement efficiency opportunities across engineering, tooling, and workflows.
4. Executive Alignment & Decision Support: Partner closely with senior executives across engineering, product, and business units. Lead executive program reviews, providing clear visibility into status, risks, and trade‑offs. Enable fast, high‑quality decision‑making by framing issues with clarity and data.
5. External Ecosystem Coordination: Work with external partners including founding partners—foundries and manufacturing partners, IP vendors, and ecosystem partners. Ensure alignment on schedule, deliverables, and quality expectations across the extended supply chain.
6. Stakeholder Communication & Rhythm: Establish a clear and consistent communication cadence across all levels of the organization. Ensure no surprises execution culture—issues are surfaced early, with actionable plans. Act as the connective tissue between engineering, product, operations, and leadership.

Qualifications

• Leadership & Execution
  • Proven track record of leading large‑scale silicon programs to successful production.
  • Experience managing senior program managers or technical leaders.
  • Demonstrated ability to operate in high‑ambiguity, high‑speed environments.
• Technical Depth
  • Strong understanding of end‑to‑end silicon lifecycle: Architecture → Design → Verification → Tapeout → Bring‑up → Production.
  • Familiarity with FPGA development cycles and ecosystems is highly desirable.
  • Ability to engage deeply with engineering teams and challenge assumptions constructively.
• Operational Excellence
  • Experience building or scaling program management and operational frameworks.
  • Strong data‑driven mindset with ability to define and track meaningful execution metrics.
  • Ability to identify systemic inefficiencies and drive measurable improvements.
• Executive Presence
  • Exceptional communication skills with the ability to influence at all levels.
  • Experience working directly with executive leadership and cross‑functional stakeholders.
  • Ability to distill complex technical and programmatic issues into clear, actionable insights.
• Mindset
  • High ownership and accountability.
  • Structured thinker with strong attention to detail.
  • Bias for action with disciplined execution.
  • Collaborative, transparent, and direct leadership style.

Bonus Points

• Experience in FPGA, ASIC, or high‑performance compute silicon programs.
• Background in both engineering and program/operations leadership roles.
• Experience working through organizational transformations or scale‑ups.

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including location, knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. $231.5K - $341.0K USD

Job Type

Regular. Shift: Shift 1 (United States). Primary Location: San Jose, California, United States.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.