Senior Hardware Design Engineer

Hardware Design EngineerThis role focuses on end-to-end ownership of complex digital hardware designs, from circuit and schematic development through PCB layout review and high-speed signal integrity analysis. The Hardware Design Engineer will work on multi-layer boards, contribute to redesigns to resolve existing issues, and collaborate closely with firmware, software, test, and mechanical engineering teams to deliver robust, production-ready hardware solutions.ResponsibilitiesDesign digital circuits and develop detailed schematics for complex electronic systems.Review and refine schematics to ensure correctness, robustness, and compliance with design requirements.Lead and review PCB layout activities, with a focus on high-speed design best practices and manufacturability.Use Altium for schematic capture and PCB layout design, ensuring consistency and accuracy across design artifacts.Perform simulations using HFSS to evaluate and optimize high-frequency and high-speed behavior of designs.Redesign existing boards and circuits to identify, troubleshoot, and resolve performance or reliability issues.Design and support multi-layer boards, typically 4–8 layers and occasionally up to 10 layers, balancing signal integrity, power integrity, and layout constraints.Own the hardware design lifecycle, including concept, design, review, validation, and support into production.Integrate and validate DDR2/DDR3/DDR4 memory interfaces and ensure stable operation under target conditions.Design and validate interfaces for various high-speed peripherals such as HDMI, DisplayPort, USB-C/USB 3.x, DVI, 3G/12G-SDI, SFP/SFP+ transceivers, Ethernet (1G/10G), PCIe, LVDS, and MIPI.Interface hardware designs with microcontrollers, ensuring proper connectivity, timing, and system-level functionality.Implement and verify high-speed signals, interfaces, and buses, including TMDS, DDR, SDRAM, and Ethernet, with careful attention to length matching, differential pairs, and controlled impedance routing.Analyze and mitigate signal integrity and power integrity issues, including crosstalk and return path concerns, using SIPI analysis and eye diagram evaluation.Collaborate with firmware, software, test, and mechanical engineers to ensure seamless integration of hardware into complete systems.Participate in design reviews and provide technical guidance on high-speed design techniques and best practices.Support testing and debugging activities, including board bring-up and validation of high-speed interfaces and multimedia/video paths.Essential SkillsProven experience in digital hardware design, including circuit design and schematic development.Hands-on experience with PCB layout design and review, particularly for high-speed digital boards.Proficiency using Altium for schematic capture and PCB layout.Experience designing and supporting multi-layer PCBs, typically in the 4–8 layer range, with occasional designs up to 10 layers.Strong experience with DDR2, DDR3, and DDR4 memory interfaces, including layout and timing considerations.Experience working with high-speed peripherals such as HDMI, DisplayPort, USB-C/USB 3.x, DVI, 3G/12G-SDI, SFP/SFP+ fiber optic transceivers, 1G/10G Ethernet, PCIe, LVDS, and MIPI.Experience interfacing hardware designs with microcontrollers.Demonstrated ability to design with high-speed signals, interfaces, and buses, including TMDS (150 MHz–500 MHz) and 10 Gigabit Ethernet.Expertise in high-speed design techniques such as differential pair routing, length matching, controlled impedance routing, and return path optimization.Experience with signal integrity and power integrity analysis, including crosstalk mitigation, eye diagram analysis, and SIPI analysis.Familiarity with multi-gigabit differential interfaces and their layout and validation requirements.Experience using HFSS or similar tools for high-frequency and high-speed simulations.Ability to take ownership of hardware designs throughout the product lifecycle, from concept through validation.Additional Skills & QualificationsExperience with video or multimedia products, particularly those involving high-speed video interfaces.FPGA experience, including integrating FPGAs into hardware designs and working with associated high-speed interfaces.Experience in electronics, electrical engineering, or a related discipline.Experience working within cross-functional engineering teams that include firmware, software, test, and mechanical disciplines.Work EnvironmentThis role is primarily on-site with flexibility for occasional remote work, such as working from home for personal appointments or on certain days as agreed with the team. Core collaboration hours are from 10:00 a.m. to 3:00 p.m., and outside those hours you may set your start and end times as long as you work an 8-hour day. You will work in a multidisciplinary engineering environment that includes 3–5 electrical engineers, 3–5 firmware and software engineers, 3 test engineers, and 2 mechanical engineers on-site, with additional collaboration with an OEM team based in Taiwan. The work involves modern electronic design tools such as Altium and HFSS, and focuses on complex, high-speed digital hardware and multi-layer PCB designs in a lab and office setting.Job Type & LocationThis is a Contract to Hire position based out of Torrance, CA.Pay and BenefitsThe pay range for this position is $62.00 - $94.00/hr. Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: • Medical, dental & vision • Critical Illness, Accident, and Hospital • 401(k) Retirement Plan – Pre-tax and Roth post-tax contributions available • Life Insurance (Voluntary Life & AD&D for the employee and dependents) • Short and long-term disability • Health Spending Account (HSA) • Transportation benefits • Employee Assistance Program • Time Off/Leave (PTO, Vacation or Sick Leave)Application DeadlineThis position is anticipated to close on Aug 12, 2026.