Sr. RTL Design Engineer - CPU
$150k - $260kCyberCoders
Job Title: Sr. RTL Design Engineer - CPU Job Location: REMOTE (presences in the Bay Area and Austin, TX) Compensation: $150K - $260K base, depending on experience, plus equity! Requirements: RTL Design, Logic Design, CPU, RISC-V, Microarchitecture, Coherent Caching Systems We are seeking a highly skilled and experienced Sr. RTL Design Engineer specializing in CPU design to join our dynamic engineering team. The ideal candidate will be responsible for the architecture, design, and implementation of complex CPU subsystems, contributing to the development of high‑performance processing units. Key Responsibilities Design and implement RTL for CPU architectures and subsystems. Collaborate with microarchitecture teams to develop efficient and scalable solutions. Conduct logic design and verification for various CPU components. Optimize design for performance, power, and area (PPA) metrics. Engage in the development of core IP and coherent caching mechanisms. Work on memory subsystem design to ensure optimal data flow and storage efficiency. Participate in design reviews and provide constructive feedback to peers. Support integration and validation of CPU designs with software teams. Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of experience in RTL design, specifically in CPU design and logic design. Strong knowledge of microarchitecture principles and RISC‑V architectures. Proficient in RTL design using Verilog or similar hardware description languages. Experience with core IP development and coherent caching techniques. Familiarity with memory subsystem design and performance optimization techniques. Excellent problem‑solving skills and ability to work collaboratively in a team environment. Experience with PTO/Vacation Days (optional). Flexible working arrangements (optional). Seniority level: Not Applicable Employment type: Full‑time Job function: Information Technology Industries: Staffing and Recruiting #J-18808-Ljbffr CyberCoders
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$181.1k - $318.4k
...aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify... ..., timing analysis, and timing closure. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the...SuggestedRelocation- ...the next groundbreaking Apple product!Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that... ...experienced engineer to help drive architecture and RTL for world-class CPU power management solutions. Description As a CPU RTL...Suggested
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$121.68k - $174.44k
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$120k - $160k
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