Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Design Verification Engineer

Apple Oakbrook

**Role Number:** 200658029-3956 **Summary** Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you'll do more than join something - you'll add something. Do you have a passion for innovation and technical excellence? Do you thrive on solving complex problems that push the boundaries of what's possible? Join our team to verify innovative, high-throughput cellular baseband modems and transceiver link controllers that power communication for millions of users worldwide. **Description** As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems. Working on innovative baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments that set the standard for quality and efficiency. You'll develop comprehensive coverage-driven and directed test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-functional teams throughout the process. In this role, you'll drive methodology innovation by deploying sophisticated tools and techniques that elevate verification practices and ensure tape-out readiness. Collaborating with product development teams across Apple, you'll help deliver cellular systems that redefine industry capabilities and enhance customer experiences globally. This position offers exceptional opportunities to deepen your expertise across cellular protocols, complex IP and subsystem architectures, advanced fabric protocols, and sophisticated debug methodologies. You'll gain experience with best-in-class design verification practices, co-verification techniques with models and firmware, and industry-standard low-power architectures. We're looking for engineers with hands-on ASIC design verification experience using reusable verification methodologies such as UVM. The ideal candidate excels at detailed test planning, adapts optimally to evolving requirements, knowledge of the latest ML based tools to improve productivity and is driven to achieve the highest quality standards. You thrive in collaborative environments and are eager to address the verification challenges inherent in complex, high-performance cellular systems. If you want to contribute to products that impact customers worldwide while advancing your technical expertise, we'd love to hear from you. **Minimum Qualifications** + BS and a minimum of 10 years relevant industry experience. + Strong knowledge of System Verilog and UVM. + Skilled in System C, C/C++, Python/perl. + Highly proficient in developing and establishing DV Methodologies. + Experience in using LLMs and MCPs. + Experience with developing Python-based automation solutions. + Experience with constraint random testing, SVA, Coverage driven verification. + Strong test planning and problem-solving skills. **Preferred Qualifications** + Master of Science degree in Electrical Engineering/Computer Science. + Experience in C/C++ modeling for design verification. + Knowledge of 4G/5G cellular physical layer operation (3GPP). + Experience with verification of embedded processor cores. + Hands-on verification experience of Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment. + Experience using LLMs to improve efficiency and quality of verification. + Understanding of prompt engineering and LLM workflow optimization. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant ( .

Vacancy posted 3 days ago
Similar jobs that could be interesting for youBased on the Design Verification Engineer in Sunnyvale, CA vacancy
  •  ...Experience with Verilog, System Verilog, and modern verification libraries like UVM 10+ years of ASIC design verification experience Experience / Background...  ...TCL is a plus Collaborate with architects, hardware engineers, and firmware engineers to understand the new... 
    Suggested

    Infobahn Softworld

    Santa Clara, CA
    1 day ago
  •  ...this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical...  ...to millions of customers quickly. **Description** As a CPU Verification Engineer owning the verification of a certain area of functionality in... 
    Suggested

    Apple

    Santa Clara, CA
    1 day ago
  • $97.7k - $182.62k

     ...job and more exclusive features. Direct message the job poster from Capgemini Engineering About the Job You're Considering Join a collaborative and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip (SoC)... 
    Suggested
    16 hours
    Full time
    Local area

    Capgemini Engineering

    Santa Clara, CA
    4 days ago
  •  ...Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art...  ...you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.... 
    Suggested
    Contract work

    CirrusLabs

    Santa Clara, CA
    4 days ago
  •  ...bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job... 
    Suggested

    Apple

    Cupertino, CA
    5 days ago
  • $119.8k - $258k

     ...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. Responsibilities Develop and execute... 
    Full time

    Sintegra

    Sunnyvale, CA
    5 days ago
  • $142.2k - $213.4k

     ...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group CPU...  ...you will work with chip architects, chip designers, implementation engineers and test engineers...  ...defining and implementing SOC level verification on large designs. ~ Experience in... 
    Work experience placement
    Work from home

    Qualcomm

    Santa Clara, CA
    1 day ago
  • $80 - $90 per hour

     ...$90.00/hr Direct message the job poster from Infotree Global Solutions We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities... 
    16 hours
    Contract work

    Infotree Global Solutions

    Santa Clara, CA
    5 days ago
  •  ...detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power...  ...all the things they love with their devices. The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT... 

    Apple

    Cupertino, CA
    2 days ago
  •  ...Job Title Architect and create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Develop test plans and coverage metrics from specifications and writing block... 

    Staffing the Universe

    Santa Clara, CA
    5 days ago
  • $115k - $268k

     ...computing. Join us and be part of one of the most exciting semiconductor startups in the industry. We are hiring multiple Design Verification engineers to advance our innovative RISC-V processors and subsystems. Role: Develop and execute verification plans for units and... 
    Contract work

    Ventana Micro Systems

    Cupertino, CA
    2 days ago
  •  ...Join to apply for the Design Verification Engineer role at Quest Global Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging deep industry knowledge and digital expertise. The company solves complex challenges across aerospace & defense, automotive... 
    Full time

    QuEST Global

    San Jose, CA
    2 days ago
  • $152.5k - $219.2k

     ...help each other grow. Because full product development-from design to qualification to production-is within our team, we're able...  ...of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary... 
    Full time
    Temporary work
    Local area
    Flexible hours

    Cisco

    San Jose, CA
    1 day ago
  • $87.4k - $132k

     ...Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure... 
    Hourly pay
    Full time
    Temporary work
    Work experience placement
    Work at office
    Night shift

    Arrow ECS

    San Jose, CA
    1 day ago
  • $130k - $192k

     ...Recruiting- 24 Years of Semiconductor Recruiting. Functional verification of complex designs. Responsible for verification from test planning, test...  ...Employment type Full-time Job function Job function Engineering and Design Industries Semiconductor Manufacturing Referrals... 
    Full time
    H1b

    Tara Technical Solutions (TTS)

    San Jose, CA
    2 days ago
  •  ...Position: Design Verification Engineer (Einfochips) Job Description: Experience: 6+ Years Location: San Jose CA Job Description: What candidate will Be Doing: At-least 6+ years of experience in  System Verilog HVL and C++/C... 
    Full time
    Temporary work
    Work at office

    Arrow ECS

    San Jose, CA
    4 days ago
  •  ...Senior Verification Engineer Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical...  ...; electronics systems and semiconductors where AI can design and create beyond human cognitive limits. Backed by Silicon... 

    Voltai

    Palo Alto, CA
    5 days ago
  • $200k - $330k

     ...Job Description Job Description About the role We're looking for a experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from... 
    H1b
    Visa sponsorship
    Work visa
    Flexible hours
    Night shift

    DensityAI

    Mountain View, CA
    17 days ago
  • $200k - $400k

     ...Job Description Job Description Sr. Design Verification Engineer We are seeking a Sr. Design Verification Engineer to help verify and deliver next-generation AI SoC platforms. In this role, you will work closely with architects, RTL designers, software engineers... 
    Permanent employment
    Temporary work

    Actalent

    Santa Clara, CA
    13 days ago
  • $180k - $230k

     ...with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive their design from concept to silicon to their next car. Summary: As a Senior ASIC Verification Engineer, you will be responsible for all aspects... 
    Flexible hours

    Ethernovia

    San Jose, CA
    4 days ago
  • $142.6k - $206.5k

     ...development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out... 
    Local area
    Shift work

    Altera

    San Jose, CA
    5 days ago
  • $135k - $155k

     ...is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink,... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    1 day ago
  • $237k - $296k

     ...the outdoors and a desire to protect it for future generations. Role Summary We are seeking a high-caliber Sr. Staff Design Verification Engineer to join our ADAS and Inference Silicon team. You will be responsible for the end-to-end functional verification of our... 
    Full time
    Contract work
    Temporary work
    Part time
    Local area
    Shift work
    Night shift

    Rivian

    Palo Alto, CA
    5 days ago
  • $158.6k - $317.8k

     ...Position Title: Design Verification Engineer, Principal (Confidential Client) Location: Santa Clara, CA | Onsite Employment Type: Permanent Compensation Salary: $158,600 - $317,800/yr Variable Compensation: Base, bonus, RSUs, Refresher RSUs Position... 
    Permanent employment

    YK Solutions LLC

    Santa Clara, CA
    2 days ago
  • $138k - $317.8k

     ...Position Title: Principal, Design Verification Engineer, UAL and PCIe Subsystems (Confidential Client) Location: Santa Clara, CA | Onsite Employment Type: Permanent Compensation Salary: $138,000 - $317,800/yr Bonus: Base, bonus, RSU, refresher RSUs Position... 
    Permanent employment

    YK Solutions LLC

    Santa Clara, CA
    a month ago
  • $158.6k - $317.8k

     ...create scalable, secure, and user-friendly applications. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology. This... 
    Full time
    Local area
    Immediate start
    Visa sponsorship
    Relocation package

    Bright Vision Technologies

    Santa Clara, CA
    2 days ago
  • $120k - $225k

     ...Job Description Job Description We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is building... 

    Mythic

    Palo Alto, CA
    23 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance... 
    Work at office
    Relocation package

    Etched

    San Jose, CA
    28 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Internal IP DV team... 
    Work at office
    Relocation package
    Night shift

    Etched

    San Jose, CA
    22 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV team... 
    Work at office
    Relocation package

    Etched

    San Jose, CA
    28 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Design Verification Engineer. Be the first to apply!