Post-Silicon ASIC Validation Engineer - Chiplet & UCIe
Eridu
Eridu is seeking a Post-Silicon ASIC Validation Engineer in San Francisco, California, to drive validation and bring-up of networking ASICs. The role involves developing test infrastructure and collaborating with design teams for optimal performance. Candidates should have a B.S. or M.S. in Electrical Engineering or related fields, alongside experience with UCIe and high-speed interconnect standards. The ideal applicant will be proficient in Python and have strong lab experience with debugging tools. #J-18808-Ljbffr Eridu
Vacancy posted 5 days ago
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