Senior Multimedia IP Verification Engineer
Dormont Manufacturing Co
Dormont Manufacturing Co is seeking a Senior Verification Engineer to join their front-end multi-media IP team. In this role, you will collaborate with ASIC design engineers and verify complex IP designs using System Verilog and UVM. The ideal candidate will have over 5 years of experience in design verification, with strong programming skills in C and Python. This position offers a competitive salary range of $136,000 - $218,500 for Level 3 and $168,000 - $264,500 for Level 4, as well as equity and benefits. #J-18808-Ljbffr Dormont Manufacturing Co
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