Senior/Principal RF Test Engineer, Texas Institute for Electronics

Senior RF EngineerDevelop and execute RF test plans for K-band (1827 GHz), Ka-band (2740 GHz), and W-band (75110 GHz) microsystems at wafer, die, module, and system levels.Perform S-parameter characterization, on-wafer probing, noise figure measurements, and power sweeps using vector network analyzers, spectrum analyzers, and signal generators.Design and implement automated test sequences using Python, MATLAB, or LabVIEW to drive measurement instruments and collect production-grade data across process corners and temperature.Develop de-embedding methodologies and calibration strategies for high-frequency measurements, including TRL, LRRM, and multi-line calibrations for on-wafer and package-level probing.Correlate measured RF results against EM simulation models (HFSS, ADS, AWR, CST) to validate design intent and feed deviations back to the design and packaging teams.Characterize passive and active RF componentsincluding transmission lines, filters, LNAs, PAs, and T/R moduleswithin 3.0D heterogeneously integrated assemblies.Support test infrastructure buildout, including fixture design, probe card specification, and lab setup for TIEs RF characterization capabilities.Author test reports, standard operating procedures, and design-for-test guidelines to support ecosystem partners and internal engineering teams.Principal RF EngineerDefine and own the RF test strategy for TIEs 3.0D heterogeneously integrated microsystems across K-band (1827 GHz), Ka-band (2740 GHz), and W-band (75110 GHz), spanning wafer, die, module, and system levels.Architect end-to-end test flowsfrom design-for-testability requirements through production screeningensuring robust, repeatable, and scalable characterization of RF, mixed-signal, and antenna-in-package subsystems.Lead development of advanced de-embedding, calibration, and measurement methodologies for novel 3DHI interconnect structures, including hybrid bonding interfaces, glass/Si interposers, and redistribution layers.Drive test-to-model correlation across EM simulation (HFSS, ADS, AWR, CST) and measured data, establishing feedback loops with design, process, and packaging teams to accelerate yield learning and performance optimization.Specify, procure, and commission RF test infrastructureincluding probe stations, VNA configurations, automated handlers, and environmental chambersfor TIEs characterization lab buildout.Establish and mentor the RF test engineering team, setting technical standards, review processes, and best practices for measurement automation, data management, and statistical analysis.Engage with foundry, EDA, metrology, and defense-program partners to define and validate test enablement requirements for next-generation RF packaging technologies.Author test strategies, reliability qualification plans, reference test procedures, and design-for-test guidelines that become part of TIEs Assembly Design Kit (ADK) deliverables.