Custom IC Layout Engineer

The Company operates Snapchat a visual messaging app that enhances your relationships with friends family and the world and Specs Inc. a wholly-owned subsidiary dedicated to making computing more human in addition to Bitmoji Saturn and other digital services.

Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs advanced eyewear that seamlessly integrates digital experiences into the physical world.

Specs Inc. also provides Lens Studio a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs Snapchat and other services.

Were looking for a Custom IC Layout Engineer to join the MicroDisplay Electronics at SPECS

What youll do:

• Work as part of a multi-disciplinary team designing display ICs for AR
• Work closely with digital and analog logic circuit and physical design engineers & other custom layout engineers
• Perform cell and block layout of Analog and Mixed-Signal circuit functions meeting design rules and performance
• Craft reusable scripts and methodologies that help automate design flow repeatability and efficiency
• Implement circuit layout strategies for optimal area performance and power goals.
• Support IC floor planning and place & route of full chip digital designs with digital and analog IP
• Provides schedule and cost inputs to program management
• Create and present design documentation for internal design reviews
• Execute parasitic extraction of circuit layout and iterate design improvements

Knowledge Skills & Abilities:

• Strong working knowledge of custom (transistor-level) layout including matching techniques
• Strong working knowledge of Cadence Virtuoso (Layout and Schematic) tool suite
• Strong working knowledge of Mentor/Siemens Calibre tool suite (DRC LVS Extraction)
• Scripting and automation such as TCL SKILL Perl Python and Shell scripts in Linux environment
• Experience and capability to execute project tape out verification including DRC ERC and LVS
• Extensive understanding of signal integrity reliability layout effects (EM IR drop) and other considerations
• Knowledge of tool flows and techniques for achieving foundry DFM requirements
• Track record of prior detailed design and custom layout experience of various types of designs such as SRAM level shifters IO design (ESD latch-up) PLLs Bandgaps ADCs DACs and amplifiers.

Minimum Qualifications:

• BSEE or relevant years of experience
• 5 years in directly applicable work performing custom layout
• Optional see preferred Qualifications

Preferred Qualifications:

• Detailed understanding of 22nm and below CMOS foundry design node rules and requirements.
• Experience with both Analog and Memory layouts
• Excellent technical documentation and verbal skills working with engineering and management teams
• Knowledge of ASIC IC test and characterization
• Understanding of digital design and place and route principles

Default Together Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster reinforce our values and serve our community customers and partners better through dynamic collaboration. To reflect this we practice a default together approach and expect our team members to work in an office 4 days per week.

At Snap we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer and committed to providing employment opportunities regardless of race religious creed color national origin ancestry physical disability mental disability medical condition genetic information marital status sex gender gender identity gender expression pregnancy childbirth and breastfeeding age sexual orientation military or veteran status or any other protected classification in accordance with applicable federal state and local laws. EOE including disability/vets.

We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring where applicable).

Compensation

In the United States work locations are assigned a pay zone which determines the salary range for the position. The successful candidates starting pay will be determined based on job-related skills experience qualifications work location and market conditions. The starting pay may be negotiable within the salary range for the position. These pay zones may be modified in the future.

The base salary range for this position is $173000-$259000 annually.

The base salary range for this position is $164000-$246000 annually.

:

The base salary range for this position is $147000-$220000 annually.

This position is eligible for equity in the form of RSUs.

If you believe this job description is missing required pay transparency information please submit a report through this form : Job Description Pay Range Disclosure .

Required Experience:

IC