PHY RTL Design Engineer

Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs, including: writing specifications, other documents, and defining microarchitecture based on MATLAB/C system model. Architect area and power. Efficient low latency designs with scalability and flexibility. Work with algorithm and software team to ensure performance and power efficiency. Power and area efficient RTL logic design, and DV support. Running tools to ensure lint and CDC/RDC clean design. Synthesis and timing constraints. Experience in design of signal processing wireless protocols. Responsibilities RTL coding and verification for PHY modem development. Support backend activities by reviewing the reports and appropriate adjustment of the design. Involve in the pre and post silicon bringup process. Minimum Qualifications Bachelor’s degree in related field. Understanding of DSP fundamentals. Digital communications knowledge. Proficiency in RTL design. Preferred Qualifications Familiarity with UVM DV environment and AI based efficiency improvement flows. Strong fixed‑point knowledge and extensive experience with bit‑true cycle‑accurate verifications. Understanding of decoders – Viterbi, LDPC, Polar. Understanding of filter design, multi‑radix implementation, and compromises. Knowledgeable in modern design techniques and energy‑efficient/low power logic design, and power analysis. Familiarity with power estimation (vector‑less and vector‑based), modeling, profiling, and post‑silicon power correlation. Solid understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP is a plus. Background in computer architecture. Bus fabric, especially APB/AHB/AXI. Power management with multiple power domains. Ability to work well in a team and be productive under ambitious schedules. Should exhibit excellent interpersonal skills and be self‑motivated and well‑organized. Experience with FPGA and/or emulation platform desired. Excellent communication skills – both written, and oral. Compensation and Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $220,900, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. EEO Statement Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. #J-18808-Ljbffr