RTL Design Engineer

Required Skills & Experience
- 5+ years of ASIC/SoC RTL design experience\n- Proven ownership of ASIC blocks from requirements through silicon bring-up\n- Experience translating architecture requirements into specifications, microarchitecture, and RTL\n- Strong hands-on Verilog/SystemVerilog RTL development\n- Experience supporting designs through verification, implementation, and silicon validation\n- Experience designing complex digital logic including FSMs, FIFOs, datapaths, and control logic

Nice to Have Skills & Experience
- Multiple successful ASIC tapeouts\n- Mixed-signal ASIC experience\n- High-speed digital design experience (DDR, PCIe, Ethernet, SerDes, HBM)\n- Post-silicon debug and lab bring-up expertise\n- IP integration experience\n- Python, Tcl, or Make scripting experience

Job Description

Insight Globals is seeking an RTL Designer to own key sub-blocks within large, advanced-node mixed-signal ASICs supporting next-generation SoC and Memory Test products.\n\nThis engineer will partner closely with chip architects, verification engineers, physical design, software, and silicon bring-up teams throughout the entire ASIC development lifecycle. The role includes defining requirements, creating microarchitecture, RTL development, verification support, physical design collaboration, and post-silicon debug.\n\nThe ideal candidate has strong ASIC design experience, enjoys cross-functional collaboration, and can take ownership of a block from specification through silicon validation.