Senior ASIC Technical Leader - RTL & DFT

Cisco Systems in Austin, TX is seeking a senior ASIC design engineer to help drive the Silicon One initiative. You will collaborate with front-end RTL and backend physical design teams to advance high-quality test, IP integration, and diagnostic features for cutting-edge networking silicon. The role emphasizes experience with Verilog/SystemVerilog, CDC/RDC concepts, AMBA protocols, and front-end tools, with opportunities to influence silicon architecture and performance at scale. #J-18808-Ljbffr Cisco Systems