Senior ASIC Design Engineer — High-Speed Networking Chips
Jobleads-US
Hewlett Packard Enterprise in California seeks an experienced ASIC/SoC design engineer to develop high-speed networking chips. You will translate specifications into micro-architectures and implement RTL with Verilog/SystemVerilog, driving tight timing and power targets.
You will collaborate with Physical Design and Verification teams to ensure full validation and high-quality silicon. Leadership opportunities include mentoring interns and new grads within a fast-paced silicon group.
#J-18808-Ljbffr Jobleads-USVacancy posted 2 days ago
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