Process Engineer - Die to Wafer Hybrid Bonding

Process EngineerApplied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.As a Process Engineer, you'll play a crucial role in designing and optimizing manufacturing processes for display and semiconductor manufacturing technologies. You will collect and analyze data, perform hardware characterization, and troubleshoot engineering issues. You'll also measure film properties, generate technical documentation, and engage with customers to resolve concerns. Process Engineers collaborate with vendors and suppliers, and become familiar with implementing new technologies and products. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.Join the Photonics Platforms Business Group within the CTO Office at Applied Materials' Santa Clara headquarters, where you will work with a world?class research team developing next?generation optical interconnects technologies.We are seeking hands?on Process Engineers to drive die?to?wafer (D2W) hybrid bonding R&D for silicon photonics and co?packaged optics applications. This role focuses on hybrid bonding process development, pathfinding, technology de?risking, and integration exploration.The engineer will develop and evaluate novel bonding flows enabling photonic–electronic co?integration, a critical enabler for AI and HPC systems. The role provides on?the?job training and hands?on experience with state?of?the?art equipment, including the industry's first fully integrated die?to?wafer hybrid bonding system.Key ResponsibilitiesDevelop die?to?wafer hybrid bonding processes, including (but not limited to):Surface preparation and plasma activationHigh?accuracy die placement and alignmentPost?bond characterization and process evaluationIntegrate D2W bonding with adjacent process modules such as:Dicing and die preparationDie thinningInter?die gap fill and planarizationDesign and execute DOE?driven experiments to understand process limits, sensitivities, and trade?offs.Own process optimization, perform failure analysis and characterization, and drive continuous engineering improvement.QualificationsM.S. or Ph.D. in Materials Science, Electrical Engineering, Applied Physics, or a related STEM discipline.In?depth knowledge and hands?on experience in one or more of the following:Die?to?wafer or wafer?to?wafer bondingThin?die handling and alignment?critical processesDirect process engineer experience on mainstream semiconductor equipment (plasma, wet clean, overlay/alignment, etc.)2.5D/3D integrationStrong understanding of:Bond interface physicsAlignment and overlay fundamentalsMechanical behavior of thin and fragile diesProficiency in statistical analysis and process control (e.g., DOE, SPC, JMP).Self?starter with strong problem?solving skills; able to work both independently and collaboratively with minimal supervision.Strong communication and interpersonal skills, with the ability to collaborate effectively across multidisciplinary teams.