Senior Verification Engineer

Overview We are looking for a Senior Verification Engineer to join the Compute Silicon & Manufacturing Engineering (CSME) organization within Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE). The team designs, develops, manufactures and packages Microsoft's state-of-the-art custom computer chips, notably the Azure Cobalt, and supports scalable cloud infrastructure across Microsoft’s online businesses and Azure platform. The role focuses on pre-silicon verification and related validation activities to enable high-volume, high-quality hardware deployment with cost effectiveness. Responsibilities Pre-silicon functional verification, creation of verification environments and tests at the block and sub-system level Reference modeling, emulation, and post-silicon validation Qualifications Minimum Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience 4+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems 2+ years of experience leading pre-silicon verification of blocks and sub-systems through full cycle 2+ years of experience in mentoring individual engineers Other Requirements Ability to meet Microsoft, customer and/or government security screening requirements Microsoft Cloud Background Check: required at hire/transfer and every two years thereafter Preferred Qualifications Experience in working with AI and motivation to utilize AI in day-to-day work Experience with PCIe subsystems Experience with formal verification methods Experience in RTL design for FPGA or emulation Experience in Assembly, startup code and linker scripts Experience in developing makefiles for software development Proficient in SystemVerilog, C/C++, and scripting languages such as Python, Ruby or Perl Knowledge of verification principles, testbenches, stimulus generation Experience with random-stimulus and coverage-based techniques along with test plan definition Background in creating UVM Test Benches, developing tests, and debugging designs Understanding of chip and/or computer architecture Experience writing tests in C and C++ Employment details Employment type: Full-time Seniority level: Not Applicable Job function: Software Development Note Microsoft is an equal opportunity employer. If you need assistance and/or a reasonable accommodation during the application process, see the company’s accommodations information. #J-18808-Ljbffr Microsoft