Senior ASIC Verification Engineer for AI/ML TPU Systems
A leading technology firm in Sunnyvale is looking for a design verification engineer to shape the future of AI/ML hardware acceleration. You will verify complex designs, collaborate with engineers, and enhance verification environments using SystemVerilog and UVM. The ideal candidate has 8+ years of design verification experience, a Bachelor's degree, and expertise in SystemVerilog. This position offers a competitive salary, bonuses, equity, and benefits. #J-18808-Ljbffr Google
Vacancy posted 1 day ago
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