Field-Programmable Gate Arrays Engineer
$250k - $400kRadley James
Senior FPGA Engineer – Low-Latency Trading
Location: New York City
Compensation: $250K–$400K base + significant performance bonus
I’m working with a highly successful quantitative investment firm looking to hire a Senior FPGA Engineer to build and lead its FPGA capability from the ground up.
This is not a maintenance or incremental development position. You’ll have the opportunity to define the architecture, tooling and technical standards for a new FPGA platform, working directly with quantitative researchers, traders and software engineers to identify where hardware acceleration can deliver a genuine trading advantage.
What you’ll be doing:
- Design and build a low-latency FPGA platform from first principles
- Develop FPGA solutions for electronic trading and market-data processing
- Work closely with traders and quantitative researchers to identify opportunities for hardware acceleration
- Own architecture and technical decisions across the FPGA environment
- Integrate FPGA technology into the wider trading and research stack
- Take projects through the full lifecycle from initial concept and design to production
- Help establish engineering standards and best practices as the FPGA capability grows
What we’re looking for:
- Significant hands-on FPGA engineering experience
- Proven experience designing FPGA-based systems end-to-end
- Strong SystemVerilog and/or VHDL expertise
- Previous experience with low-latency electronic trading, market data or similarly performance-sensitive systems
- Strong understanding of FPGA architecture and hardware/software integration
- Ability to operate with significant autonomy and make high-level architectural decisions
- Degree in Computer Science, Electrical Engineering or a related technical discipline
- Strong communication skills and the ability to collaborate directly with quantitative and software engineering teams
The key attraction is ownership: rather than inheriting a mature FPGA stack, you’ll have the mandate to determine how the platform should be designed and built from day one.
Compensation: $250K–$400K base + significant performance-driven bonus. Total compensation can be substantially higher for exceptional candidates.
If you’ve built ultra-low-latency FPGA systems within trading and want the opportunity to architect a platform from scratch, please reach out for a confidential discussion.
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