Staff Design Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Heterogeneous Integration Group (HIG) is shaping the future of AI and accelerated computing by developing advanced memory solutions! The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems, collaborating across global engineering and product teams to deliver industry-leading performance, power efficiency, and reliability! HBM product family is growing due to high demand from industry-leading semiconductor companies. As an HBM Memory Design Engineer – Sustaining (Staff) , you will work closely with cross-functional teams including Design Engineering (DE), Product Engineering (PE), Process Integration, Packaging, and Technology Development (TD) to analyze and resolve silicon issues across HBM products . You will collaborate with architecture to understand new or updated specification requirements and contribute to the implementation, verification, and maintenance of design updates , supporting both silicon release and ongoing product lifecycle needs. This role requires strong AI driven technical execution and the ability to independently drive complex issues to closure. Responsibilities Design Support: Work on HBM product design and support sustaining design maintenance (ECOs/spec changes). Silicon Debug: Own end-to-end debug of silicon, system, and customer issues, driving root-cause analysis and resolution. Cross-Functional Collaboration: Work closely with DE, PE, TD, and system teams to execute issue resolution and ensure alignment on priorities. Quality & Yield Improvement: Identify and debug yield, reliability, and performance issues to improve product quality. Customer Support: Support customer bring-up, qualification, and system-level debug activities as needed. Continuous Improvement: Contribute sustaining learnings to improve design quality, debug efficiency, and verification methodologies. Required Qualifications 6+ years (BS) or 4+ years (MS) in Electrical Engineering, Computer Engineering, or related field Strong understanding of DRAM/HBM architecture and high-speed memory interfaces Experience in digital and/or custom design and verification Hands-on experience in silicon debug or post-silicon validation Ability to independently drive complex technical issues to closure Proficiency in Artificial Intelligence (Claude Code or similar) in improving design quality and efficiency Preferred Qualifications Experience with HBM/DDR/LPDDR or high-speed IO systems Background in system-level debug and silicon-to-system correlation Knowledge of timing and margin analysis, signal and power integrity Experience with DF