Lead EDA Tools Engineer (C++, Characterization)
Cadence Design Systems Inc
Cadence Design Systems is seeking a Lead EDA Software Engineer (C++, Characterization) in San Jose. You will join a team shaping timing analysis and transistor-level characterization for advanced digital and mixed-signal circuits, with a focus on scalable, high-performance tools.
The role requires deep C++ expertise in Linux, a solid foundation in data structures and algorithms, and experience with EDA tool development.
#J-18808-LjbffrVacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Lead EDA Tools Engineer (C++, Characterization) in San Jose, CA vacancy
$141.91k - $269.1k
...Description: The Role and ImpactJoin Intel's mission to engineer world-changing technology as a Senior EDA Tools Hardware Engineer. We are seeking an experienced... ...to develop and maintain transistor-level timing characterization flows for custom IPs, embedded memories, SRAMs,...SuggestedFull timeInternshipLocal areaImmediate startShift workIntel
Santa Clara, CA2 days ago- ...Intel Corporation in California is seeking a Senior EDA Tools Hardware Engineer to develop and maintain transistor-level timing characterization flows for custom IPs, embedded memories, SRAMs, and macros across advanced technologies. You will drive automation and model...Suggested
Intel
Santa Clara, CA1 day ago $149.6k - $284.58k
...highly motivated team of top-notch engineers solving challenging technical problems... ...and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.Build and... ...and efficiency of rule checks.Lead innovation initiatives to enhance existing...SuggestedFull timeInternshipLocal areaImmediate startShift workIntel
Santa Clara, CA2 days ago$141.91k - $269.1k
Job Details:Job Description: The Role and ImpactJoin Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-...SuggestedFull timeLocal areaImmediate startWorldwideShift workIntel
Santa Clara, CA1 day ago$100k
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease... ...is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor...SuggestedPermanent employmentTenstorrent
Santa Clara, CA2 days ago- ...Altera is seeking a seasoned software engineer to shape its FPGA design software. You will work on lightweight, scalable data models for... ...structures. The role sits in the Database, Infrastructure & Tooling (DBIT) team in San Jose, focusing on collaboration across...
191 Altera Corporation
San Jose, CA1 day ago - ...senior architect for package substrate EDA in Sunnyvale, CA. You will lead architectural decisions for... ...development of scalable EDA software in C++, Python, and TCL. You will collaborate... ...foundries and OSAT partners, mentor engineers, and influence product strategy at the...
Synopsys
Sunnyvale, CA5 days ago - ...focused hardware, seeks a Senior Design Engineer in the US to optimize EDA flows and drive our ASIC design... ...environment in San Jose. You will architect tooling strategies, bridge hardware design... ..., and strong scripting in TCL, Python, BASH, and C/C++. #J-18808-Ljbffr...
Bitdeer (NASDAQ: BTDR)
San Jose, CA4 days ago $240k - $333k
...bridging chip design, architecture, product engineering, and system software to architect... ...Direct end-to-end post-silicon validation, characterization, and debugging across advanced voltage,... ....As the SoC Hardware Characterization Lead, you will be the principal technical...WorldwideGoogle
Mountain View, CA4 days ago- ...breakthroughs, or bringing leading edge products to... ...communicate clearly with engineers, architects,... ...retimer tuning, FEC/BER characterization, topology discovery, routing... ...including embedded C/C++, boot flows, power management... ...interactions using tools such as JTAG, protocol...
AMD
Santa Clara, CA2 days ago $200k - $300k
...As a Custom Design Lead, you will participate... ...Lead a small team of engineers responsible for development... ...schematic development and characterization of custom memories (... ...and drive adoption of Tools, Flows, and... ...with industry-standard EDA tools for schematic, layout...NUVACORE
Santa Clara, CA3 days ago- ...looking for a CAD Back-end Lead to build, integrate, and support... ..., circuit simulation, characterization, physical implementation, timing... ...will own flow architecture, EDA tool integration, automation,... ...time, reproducibility, and engineering productivity. Responsibilities...
Velaura
Santa Clara, CA12 hours ago - ...highly capable Applications Engineer to support and advance Velocity-based EDA-to-ATE conversion flows for leading semiconductor customers worldwide... ...AI-driven productivity tools and intelligent automation frameworks... ...Python, Java, Perl, and/or C++• Strong debugging and...Worldwide
Advantest
San Jose, CA5 days ago - ...Altera in San Jose, California is seeking a Software Engineering Manager to lead the GUI development team for our EDA tools. You will mentor engineers, influence... ...management experience and strong proficiency in C++, Qt, Python, Tcl, and Java, plus a solid background...
Altera
San Jose, CA4 days ago - ...Apple Inc. is seeking a Library Development Manager to lead the design and characterization of standard cell libraries for Apple products in cutting... ...AI-driven development, experience with Verilog/VHDL, EDA tools, and cross-functional collaboration to meet product requirements...
Apple
Santa Clara, CA3 days ago $232k - $368k
...outstanding SoC Verification Engineer to serve as a Person-in-Charge... ...leadership with clear mitigation plans.Lead risk identification and... ...; familiarity with C/C++ for directed and hardware-controlled... ...verification infrastructure: EDA tool configuration, regression automation...Full timeNvidia
Santa Clara, CA3 days ago- ...Senior Software Engineer (C++/DS/Algorithm)Siemens EDA is a global technology leader in Electronic Design Automation... ...software. Our cutting-edge software tools empower companies worldwide to... ...challenges and contributing to industry-leading solutions?We are seeking a Senior/...Worldwide
Siemens
Santa Clara, CA5 days ago - ...in San Jose, CA seeks a Senior Design Verification Engineer to develop CAD tools, automation, and flows for advanced memory design.... ...implementation. The role requires 5+ years in CAD/EDA, with strong Python and C/C++, and experience with Cadence Virtuoso, Calibre, and...
Micron Technology
San Jose, CA3 days ago - ...Altera Corporation in San Jose, CA is hiring an EDA Software Engineer to help advance Quartus Prime by building scalable data models and fast APIs. You will use C++ and Python to model FPGA devices, access device databases, and support synthesis, placement, timing,...
Altera
San Jose, CA1 day ago - ...Reference21-03683Description The successful candidate will work as a member of the product engineering group and interface with manufacturing teams in developing and characterizing liquid-crystal-based light modulators. Relevant experience in characterizing and...
Intelliswift
Milpitas, CA3 days ago - ...communications with Tier 1 ecosystem partners. You will align Cadence and partner marketing with internal teams to drive joint campaigns, leads, and revenue through coordinated programs and events. You’ll engage executives and drive measurable business development, improve...
Cadence Inc
San Jose, CA4 days ago $168k - $264.5k
...amazing people.NVIDIA's world-leading hardware relies on design... ...limits of conventional tools. Our team develops highly optimized internal EDA technology by combining novel... ..., and high-performance C++.We are seeking a Senior Software R&D Engineer to invent the next generation...Full timeNvidia
Santa Clara, CA1 day ago- ...Engineer For Semiconductor Software And AutomationWe are... ...and applying modern AI tools to real-world... ...technical problems for leading semiconductor companies... ...skills using Python, Java, C++, or similar languages,... ...workflows.Familiarity with EDA tools or semiconductor...
Advantest
San Jose, CA5 days ago $272.9k - $409.3k
...Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group SoC... ...controller and IO (PCIe) flows ~ Proficient in C++ and Perl / Python ~ Exposure to... ...performance/power model and thoroughly characterize it Work with architects and RTL developers...Work experience placementWork from homeNight shiftQUALCOMM, Inc.
Santa Clara, CA3 days ago$152k - $241.5k
...a member of the Hardware Infrastructure EDA Compute team, you will optimize, scale, and... ..., measurable, and aligned with long-term engineering demands.What you'll be doing:Manage,... ...for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed...Full timeNvidia
Santa Clara, CA4 days ago$124k - $195.5k
As an HPC Operations Engineer at NVIDIA, you will play a pivotal role in ensuring the flawless... ...compute environmentsFamiliarity with EDA workloadsNVIDIA offers highly competitive... ...for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed...Full timeNvidia
Santa Clara, CA2 days ago$152k - $241.5k
...gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will... ...will enable our engineers to have the best tools on the planet to make the most... ...programming and debugging skills with C/C++, Python, and Perl on UNIX.A passion for...Full timeWorldwideNvidia
Santa Clara, CA4 days ago$152k - $241.5k
...of the Hardware Infrastructure EDA Compute team, you will... ...measurable, and aligned with long-term engineering demands. What you'll be... ...throughput, and turnaround time Lead problem solving across... ...existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA...NVIDIA Corporation
Santa Clara, CA2 days ago$232k - $368k
...is seeking an experienced Principal EDA R&D Engineer to pioneer the next generation of Hardware Formal Verification tools!In this position, you will lead research, architecture, and development... ...implementation in high-performance C/C++ environments, ensuring seamless...Full timeNvidia
Santa Clara, CA2 days ago- ...a dedicated Software Developer on the Clocks team to design and enhance RTL-generation tools across NVIDIA products. You will bridge software and hardware concepts, focusing on C++ algorithms and Verilog RTL workflows in a collaborative environment. The role emphasizes...
NVIDIA
Santa Clara, CA3 days ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Lead EDA Tools Engineer (C++, Characterization). Be the first to apply!
Related searches
- lead infrastructure engineer San Jose, CA
- lead operating engineer San Jose, CA
- lead algorithm engineer San Jose, CA
- lead network engineer San Jose, CA
- lead engineer San Jose, CA
- lead system engineer San Jose, CA
- c++ developer San Jose, CA
- c++ programmer San Jose, CA
- c++ software developer San Jose, CA
- c++ San Jose, CA