Principal Silicon Technology Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD.At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.THE ROLE: We are seeking an exceptional Principal Engineer to serve as a technical authority and strategic contributor across the full product lifecycle of FPGA and ASIC solutions. This role encompasses advanced silicon technology evaluation, design enablement, process development, and manufacturing bring-up — spanning from early concept exploration through qualification and transfer to high-volume production (HVM). THE PERSON: The ideal candidate must be familiar with advanced silicon technologies including manufacturing process, device physics, reliability mechanisms as well as foundry PDK support. A good understanding of FPGA and ASIC product development and yield ramp-up is desired. The candidate shall possess effective communication, good interpersonal skills and be able to work seamlessly with design teams, foundry partners and package/assembly vendors. KEY RESPONSIBILITIES:Responsible for technology evaluation, design enablement and process development of FPGA and ASIC products in advanced nodesResponsible for product WAT analysis, performance correlation and yield analysis during NPI in collaboration with foundry and design teamsCoordinate testchip design and tapeout for process and IP validation prior to NPI phaseCo-work with design, CAD & PDK teams to accomplish robust IP & product designsAssist Silicon technology roadmap exploration to meet end customer requirements PREFERRED EXPERIENCE:Familiar with advanced semiconductor technologies including FinFET, GAA, Backside Power etc.Past experience of supporting product silicon development and NPI is required Strong background in development and tape out of process and IP validation test vehicles Working knowledge of IP and SoC analog and digital design flows with foundry PDK support experience Experience with major EDA tools for device model, layout, circuit simulation, parasitic extraction, and physical verificationFamiliarity with device reliability degradation mechanisms, test methods, and lifetime modelingWorking knowledge of 3DIC advanced packaging technologies including CoWoS and SoIC is a plusStrong analytical, problem solving, decision-making and communication skillsPrior team leadership and management experience is a plus ACADEMIC CREDENTIALS:Bachelor’s degree in engineering or physical science, preferably with advanced degree (MS or PhD)This role is not eligible for visa sponsorship.#LI-BW2Benefits offered are described: AMD benefits at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.