Director, Hardware Engineering

About Us At InspireSemi, we're not just building chips; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all seamlessly connected. We're driven by a mission to make high-performance computing more accessible, energy-efficient, and easier for developers to harness. Ready to make a real impact? Join our passionate team! Why Join InspireSemi? Be a Pioneer: Get in on the ground floor of a hypergrowth startup! You'll be part of the leadership team shaping the future of computing. Scale the Vision: You will have the opportunity to build, scale, and mentor a team. Rewarding Compensation: We offer a competitive salary, performance-based bonuses, and significant equity. Flexibility: Benefit from a hybrid work model and flexible time off. The Opportunity We are seeking a Director of Hardware Engineering to lead our silicon development organization. You will oversee the entire hardware lifecycle, from initial architecture and RTL design to physical implementation, DFT, and post-silicon bring-up. What You’ll Do Strategic Silicon Roadmap: Own the hardware execution strategy. Make critical decisions on process node selection, third-party IP integration, and package design. Team Scaling & Mentorship: Recruit and lead a world class team. Hardware-Software Relationship: Partner with the Director of Software to ensure the hardware architecture is optimized for modern HPC workloads and compiler efficiency. Execution Excellence: Drive the methodology for multi-site design synchronization, ensuring top-tier verification coverage and first-pass silicon success. Vendor & Foundry Management: Manage high-level relationships with foundries, EDA vendors, and IP providers to ensure favorable terms and support. Post‑Silicon Leadership: Oversee the transition from GDSII to silicon bring‑up, working with yield and test engineering to drive high-volume manufacturing readiness. What You Bring Experience: 8+ years in semiconductor engineering, with 6+ years in leadership roles managing complex SoC or CPU projects. Advanced Node Expertise: Proven track record leading development cycles for bleeding‑edge silicon, specifically at 5nm or below technology nodes. Education: A Bachelor’s or Master’s in Electrical Engineering or Computer Engineering. Technical Mastery: Deep expertise in the full Netlist-to-GDSII flow, including high-speed interconnects, memory hierarchies, and power delivery. Tape‑out Track Record: Proven history of leading multiple successful tape‑outs on advanced FinFET nodes. Business Acumen: Ability to balance technical perfection with time-to-market pressures and budgetary constraints. Influence: A strong reputation in the silicon industry with the ability to attract top-tier talent and negotiate with global partners. Bonus Points Experience with large-scale mesh interconnects or many-core architectures. Background in advanced packaging (2.5D/3D IC, Chiplets). Direct experience with RISC-V ISA implementation at scale. If you are a seasoned hardware leader ready to steer the development of the next generation of supercomputing silicon, we’d love to hear from you. #J-18808-Ljbffr