Senior Emulation Engineer - RTL/FPGA Systems
$185k - $250kEridu Corporation
A cutting-edge hardware startup in California is seeking an Emulation Engineer to build and deploy emulation models from RTL designs. The role involves collaboration with cross-functional teams to enhance hardware verification processes. Candidates should have solid experience in ASIC logic design and proficiency in tools such as Verilog and SystemVerilog. The compensation for this role ranges from $185,000 to $250,000 per year based on skills and market trends. #J-18808-Ljbffr Eridu Corporation
Vacancy posted 2 days ago
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