Senior Space ASIC/FPGA Designer - Secret Clearance

Job Title: ASIC & FPGA Design Engineer Location: Denver, CO or Highlands Ranch, CO (Lockheed Martin Space facility). Teleworking not supported. Overview Lockheed Martin Space is building the best ASIC/FPGA team in the world. The role supports over 50 R&D programs across military, civil, and commercial space missions, requiring expertise in low SWaP, radiation‑hardened, space‑rated devices. Key Activities Work with low SWaP, radiation‑hardened, space‑rated devices. Perform all aspects of ASIC and FPGA development from requirements capture through architecture, design, simulation, and testing in a Linux‑based HPC environment. Support technical reviews and present to internal and external stakeholders. Interface with an independent verification team working in parallel to verify the design. Qualifications 8+ years of professional experience. Bachelor of Science in Electrical Engineering or related discipline (or equivalent). Experience designing FPGAs, digital ASICs, and mixed‑signal ASICs. HDL programming in VHDL, Verilog, and/or SystemVerilog. Experience in a Linux development environment. DoD Secret clearance required (ship). Desired Skills ASIC/FPGA lifecycle experience (architecture, design, simulation, verification, validation, integration, and test). Verification experience is a plus. Electronics design, lab integration, and troubleshooting experience. Knowledge of space‑grade FPGAs/ASICs and toolsets such as AMD/Xilinx Vivado or Microchip Libero. Experience with MS Project, JIRA, or similar project management tools. Experience with Earned Value Management System (EVMS). Mentoring junior engineers. Equal Opportunity Employer Statement Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics. Application Window Apply within 5–30 days after posting for optimal consideration. The application window closes in 90 days. #J-18808-Ljbffr Jobs via Dice