AI Model Performance Architect - HW/SW Co-Design Lead
HP
HP in Palo Alto is seeking an experienced engineer to bridge system memory architecture with AI model behavior, ensuring optimal performance through HW/SW co-design. This role involves developing optimization strategies for faster model startups and improved inference efficiency. The ideal candidate should have a degree in Electrical Engineering and over 12 years of experience. Responsibilities include analyzing system bottlenecks, optimizing model execution, and leading innovative design efforts. The position offers a competitive salary, comprehensive benefits including health insurance, and generous paid time off. #J-18808-Ljbffr HP
Vacancy posted 1 day ago
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