Senior Digital Design Engineer - NVLink Fusion RTL ASIC
NVIDIA
NVIDIA in Santa Clara, CA, seeks a Senior Digital Design Engineer for its NVLink Fusion AI infrastructure SoC team. You will analyze architectural requirements, implement RTL blocks, and collaborate with architects, verification, and SoC integration engineers to deliver high-performance, power-efficient designs. The role emphasizes delivering verified RTL, trade-off analysis, and IP integration. A bachelor's or master's in EE/CE with 5+ years of relevant ASIC experience and experience with #J-18808-Ljbffr NVIDIA
Vacancy posted 4 days ago
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