SoC Memory Interconnect Validation Engineer

Job Description

THE ROLE:
Client is looking for a systems validation engineer to provide thought subject matter expertise to our growing team. As a key contributor, you will have a strong technical background to contribute to all aspects of the post-silicon development process. We have competitive benefit packages and an award-winning culture. Join us!


The Client S3 Business Unit IP Systems Engineering team is seeking an energetic, dynamic, experienced IP Systems Engineer to join our growing team. We work with customers to develop new products, previously including game consoles. As an IP Systems Engineer, you will drive the planning, post-silicon execution, silicon bring-up and debug of Client processor and graphics based systems while working closely with internal teams to meet product development milestones.


As a key contributor to the success of Client's IP, you will be part of a leading team that drives and enhances Client's abilities to deliver industry leading technologies to our customers. The Systems Engineering team encourages technical innovation to showcase successes, provides opportunities to develop technical knowledge, and facilitates career development.


This role specifically focuses on the validation of SoC internal data system interconnect and data translation layers.


THE PERSON:
You are a highly motivated hands-on engineer with a strong development background, problem solving mentality, excellent written and verbal communication skills, ability to prioritize tasks along with willingness to learn and adapt. Excellent teamwork skills and experience working on a global team is required.


KEY RESPONSIBILITIES:
• Participate in systems design development throughout entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validation.
• Lead technical presentations, demonstrating a good understanding of hardware architecture and expertise in systems design
• Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the Client data fabric layer.
• Work with Program Leadership team to define the end to end plan and highlight possible risk areas and address concerns during planning.
• Isolation and debug of issues found in the northbridge and memory interconnect systems during pre-silicon, bring-up, validation, and production phases of S3 products
• Able to proactively support team culture that fosters knowledge sharing, excellence, and collaboration
• Defining and executing validation strategies, enablement of features and unit test plans
• Publishing and aligning test plan requirements, deliverables and dependencies
• Working closely with supporting teams such as design, diagnostics, Software/Firmware/BIOS/driver, and project leadership
• Lead cross-functional technical discussions to drive root cause identification and resolution on technical issues
• Driving and participating in technical innovations to enhance Client's validation capabilities including tool and script developments, technical and methodology enhancements

REQUIREMENTS:
• In-depth knowledge of CPU memory hierarchy systems and computer architecture
• In-depth knowledge of SOC architecture and concepts
• In-depth knowledge of northbridge / southbridge technology
• Experience with FPGA and other hardware emulation platforms for pre-silicon debug
• Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure points
• Good understanding of Boot Flows/Sequences
• Led process improvement initiatives to improve engineering quality
• Strong technical leadership and mentoring skills
• Knowledge of standard power management features and use-cases

PREFERRED EXPERIENCE:
• Minimum 3-6 years of experience in pre and post-silicon validation and 4-8 years experience in semiconductor industry
• Demonstrated ability to grasp new technical concepts quickly
• Strong programming/scripting skills (e.g. Python, C/C++, Ruby)
• Experience with Windows and Linux
• Experience with IP/System level bring-up, SOC debug techniques and methodologies
• Strong analytical/problem solving skills and pronounced attention to details
• Excellent written and verbal communication skills
• Self-starter, strong collaborator, and able to independently drive tasks to completion
• Strong organizational skills and ability to handle multiple issues at the same time


ACADEMIC CREDENTIALS:
• Bachelor's/Master's degree in Computer Engineering, Electrical Engineering or related field strongly preferred

Top Skills:

- Deep understanding of SoC Memory hierarchal systems

- Hands-on Post-silicon validation and SoC integration experience

- SoC memory architecture and cache coherency design familiarity

- Power states, system interconnect and control fabric