Staff Signal and Power Integrity Engineer

Staff Signal and Power Integrity Engineer Google Mountain View, CA, USA Requirements Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. 6 years of experience working in signal and power integrity engineering. 3 years of experience in technical leadership. Preferred Qualifications PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. 10 years of experience in high-speed hardware design and SIPI analysis for consumer electronics. Experience in leading signal and power integrity sign‑off for complex SoCs and mobile platforms. Experience with advanced EM simulation tools (Cadence Sigrity, HFSS, ADS) and laboratory measurement equipment for correlation studies. Experience with scripting (Python) to drive simulation automation and methodology improvements. About the job Our team serves as the center of excellence for Signal and Power Integrity (SIPI) within the Pixel hardware organization. We drive technical innovation and sign‑off methodologies for pixel platform design, supporting multiple concurrent product generations (Pixel 27, 28, and beyond). We own the end‑to‑end SIPI process, from initial architecture and stackup definition to complex PDN modeling and HSIO validation. By leveraging cutting‑edge automation and academic research collaborations, we solve critical hardware challenges to ensure the performance and robustness of Google's flagship devices. Responsibilities Lead SIPI design, simulation, and validation for next‑generation Pixel platforms. Develop and optimize automated simulation flows for Power Delivery Networks (PDN), power trees, and high‑speed signal integrity. Perform board‑level SIPI feasibility studies, including stackup definition and decoupling capacitor strategies. Execute lab measurements and correlation studies to calibrate simulation models with real‑world hardware performance. Collaborate cross‑functionally with Architecture, Silicon, and Product Design teams to resolve complex electrical design trade‑offs. The US base salary range for this full‑time position is $189,000‑$274,000 plus bonus, equity, and benefits. The range is determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Compensation details listed in US role postings reflect the base salary only and do not include bonus, equity, or benefits. Equal Employment Opportunity Statement Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity or expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy, expectant or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. For more information, see Google's EEO Policy, workplace discrimination policy, belonging initiatives, and hiring practices. #J-18808-Ljbffr Google