Staff Digital Design Engineer: Low-Power SoC & Clocking
Silicon Labs
Silicon Labs in Austin, TX, is looking for a Staff Digital Design Engineer to develop advanced SoC devices for the wireless IoT market. This role entails designing low-power architectures, collaborating on power management strategies, and overseeing the integration of complex digital subsystems. The position requires strong RTL design expertise and 10-20 years of experience in digital CMOS IC design. In addition to a competitive salary, benefits include medical plans, 401k matching, and flexible PTO. #J-18808-Ljbffr Silicon Labs
Vacancy posted 5 days ago
Similar jobs that could be interesting for youBased on the Staff Digital Design Engineer: Low-Power SoC & Clocking in Austin, TX vacancy
$143.15k - $265.85k
Staff Digital Design Engineer - SOC Low Power, Clocking & Integration (Austin, TX) Responsibilities The Role as a Staff Digital Design Engineer, you will develop world‑class, highly integrated, low‑power, System‑on‑Chip device to serve the IoT wireless market. Develop complex...DigitalFlexible hoursShift work- Silicon Laboratories Inc. is seeking a Staff Digital Design Engineer in Austin, TX, to develop state-of-the-art, low-power SoC devices for the IoT market. The role involves leading design teams and collaborating on complex chip architectures aimed at optimizing performance...Digital
- ...a Senior Analog Validation Engineer to lead post-silicon validation... ...subsystems in Ambiq’s ultra-low-power SoCs. You will develop validation... ...between analog, digital, firmware, and power management... ...will collaborate with Analog Design, Digital Design, Verification...Digital
- ...SoC Physical Design Engineer, Electrical Analysis Work Locations (2) Submit Resume Imagine what you could do here... ...industry experience Knowledge of low-power circuit design, computer architecture, and/or digital systems. Preferred Qualifications...Digital
Apple
Austin, TX4 days ago $141.91k - $200.34k
...Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in... ...designedOptimize logic designs to meet power, performance, area, and timing goals... ...VerilogExpertise in SoC integration, SoC clocking, and low-power design methodologiesExperience...SuggestedFull timeLocal areaImmediate startWorldwideShift workNight shift- ...propelled by the top engineers in mixed-signal... ...your career! As a Digital Design Engineer, you will... ...industrial, audio, power, and embedded... ...of system‑on‑chip (SoC) devices, digital... ...RTL development. Clock and reset domain crossing... ....Exposure to low‑power and high‑performance...DigitalFull time
- ...goal of enabling human life on Mars.SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re... ...(e.g. synthesis, floorplanning, power/ground grid generation, place and route... ...solid state physicsKnowledge of CMOS digital design principles, basic standard cells...DigitalPermanent employmentWorldwideWeekend work
$140k - $229.8k
...Technologies, Inc.Job Area:Engineering Group, Engineering... ...for all. QCTs Digital ASIC Team is... ...for several physical design engineering positions in our SOC and core design team... ...complex, high-speed, low power designs such as GPU... ...multi-corner (MMMC) clock tree synthesis,...DigitalWork experience placementWork from home$159.2k - $215.3k
...constellation of Low Earth Orbit satellites... ...implementing the digital chip SOCs for communications... ...with RTL/logic designers to drive architectural... ...studies, explore power-performance-area... ...and route, power/clock distribution, congestion... ...physical design engineers as well as with...DigitalPermanent employmentFlexible hours- ...the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC applying innovative process... ...planning, place and route (PnR), power grid, timing (STA), physical... ...culture, our benefits and our digital tools. By welcoming as many perspectives...DigitalInternship
Apple
Austin, TX3 days ago - ...skilled and experienced SoC (System-on-Chip) Engineering Leader to direct a diverse... ...and Verified Designs for Power and Clocking. If you are a self-motivated... ...Gating, Voltage Regulation, Digital Clocking, Reset, standards... ...ACPI and BSA, Processor low power states, Use-Cases...DigitalWork at officeLocal area
- ...and experienced VLSI Design Engineers/Micro-architects. As a VLSI Digital Design Engineer/Micro... .... Optimize for Area, Power, and Performance (PPA... ...docs). Contribute to IP/SoC Integration: Work on... ...design practices (Clock/Voltage domain crossing, Low Power Design, DFT) Design...Digital
- ...SoC Design Verification Engineer At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking... ...Develop and execute verification plans for complex SoC digital designs. Create and maintain UVM/SystemVerilog based...DigitalRemote work
InspireSemi
Austin, TX5 days ago - ...rapidly scaling its AI-focused power delivery business. Products include high-performance digital power VRMs, multiphase... ...Renesas is seeking a Mixed-Signal SOC Engineer for our Infrastructure Power team... ...Austin, TX. Reporting to the Design Engineering Manager, you will...Digital
- ...leading innovator in low-power wireless... ...highly integrated SoCs, Silicon Labs provides... ...contribute to meaningful engineering projects while... ...available internship. Design Engineering Teams... ...power management, clocking, sensors, or other... ...technologies. Digital Design : Support the...DigitalInternshipSummer internship
- Tenstorrent is seeking a Staff Digital Design Engineer to define, build, and optimize high-performance IP and SoC architectures for next-gen AI workloads. You will work at the... ...backend teams to push silicon performance while meeting power and #J-18808-Ljbffr TenstorrentDigital
$220.92k - $311.89k
...Impact As a Physical Design Timing Engineer, you will play a... ...System-on-Chip (SoC) products. In this... ...ensuring optimal timing, power efficiency, and... ...Collaborate with clocking teams and full-... ...high-performance, low-power clock network... ...Understanding of digital design fundamentals...DigitalFull timeLocal areaImmediate startShift work$220.92k - $311.89k
...seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification... ...efforts, including co-verification of digital designs with firmware and... ...years work experience- Familiarity with power intent verification (UPF) and security...DigitalFull timeWork experience placementLocal areaImmediate startWorldwideShift workNight shift$138k - $208k
...Title Front-End ASIC Digital Design, Sr. Staff Engineer -18423 Job ID 184... ...for high-performance SoCs, drive synthesis and timing... ..., CDC/RDC, timing, and power sign-off criteria... ...analysis. * Experience with low-power design techniques: clock gating, power gating,...DigitalFull timeRemote workWorldwide- ...believe technology has the power to solve the world’s... ...future. Whether you’re designing next-gen processors,... ...efficiency for System-on-Chip (SoC) products across all... ...and analytical engineer who is passionate about... ...datapath accelerators, and low-power design methodologies...
$205.74k - $251.46k
...market segment of chip design, including artificial... ...looking for hardware engineers who are passionate... ...architecture of choice for SOC designs across a... ...software development.As a Power-Management/Reset/Clock Micro-Architect and... ...Experience with AMBA Low Power Protocol...Full timeWork experience placementFlexible hours- ...Computing & Graphics (CG) SoC Architecture team, you will develop and design custom silicon for... ...specifications, performance, and power trade-offs. The role... ..., teams, and customer engineering teams.KEY RESPONSIBILITIES... ..., power delivery, clock distribution, floor planning...
$136k - $218.5k
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for... ...with the front design team to understand the clocking... ...physical constraints.Improve Power, Performance, and Area (... ...to GPU, CPU and SOC verification team, timing...Full timeWork experience placement$220.92k - $311.89k
...Description: Intel’s AI SoC organization is... ...Formal Verification Engineer, you will play a critical... ...of complex digital designs using advanced formal... ...validate design, analyze power/performance, and... ...digital design concepts, clock domain crossings, and low-power design...DigitalFull timeInternshipLocal areaImmediate startShift work- Business Unit DescriptionAI Chip Engineering Digital IP team defines and develops... ....Plan IP documentation and design, including providing schedule... ...expert support to subsystem, SoC, validation, and applications... ...checks, including Lint, clock domain crossing (CDC) analysis...DigitalFull timeWork at officeLocal area
- Position:ASIC Design Engineer (eInfochips)Job Description:Role: Asic Design... ...tools, CDC checkers, low power static checkers, linting)Experience... ...power intent)Proficiency in clock crossing techniques.... ...understanding RTL Design and Digital conceptsStrong experience with...DigitalFull timeWork at officeRemote work
$168k - $264.5k
...are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-... ...implementation of high-performance, low power CPUs. You will work closely... ...chip floor plan, power/clock distribution, chip assembly,... ...Computer Architecture and Digital Systems design. Highly proficient...DigitalFull timeRemote work$116k - $233.8k
...humans interact with their digital world.Team Description: The Brain Interfaces Soc Department delivers... ...a team of exceptional engineers whose mission is to push... ...Responsibilities: Our Digital IC Design Engineer will be... ...in high-throughput low-power digital signal processor...DigitalFull timeTemporary work$100k - $140k
PCB Design Engineer Austin, TX Join a global leader in rugged... ...printed circuit boards that power next-generation... ...schools, affordable housing, low crime, and an... ...background designing high-speed digital PCBs utilizing... ...structures, antenna layouts, clock distribution, and high-...DigitalFull timeFlexible hours$141.91k - $269.1k
...use technology to power major breakthroughs... ...a front seat in designing the latest core IP... ...place and route, clock tree synthesis, floor... ...a highspeed, low power synthesizable... ...Bachelors in Computer Engineering or Electrical... ...in Synthesis of a digital logic block or partition...DigitalFull timeWork experience placementInternshipLocal areaImmediate startShift work
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Staff Digital Design Engineer: Low-Power SoC & Clocking. Be the first to apply!
Related searches
- staff data engineer Austin, TX
- senior staff engineer Austin, TX
- senior staff systems engineer Austin, TX
- engineering aide Austin, TX
- software engineer staff Austin, TX
- staff design engineer Austin, TX
- assistant engineer Austin, TX
- assistant mechanical engineer Austin, TX
- technology administrator Austin, TX
- staff engineer Austin, TX