Software Engineer III, Machine Learning Compiler, TPU Scaling

Software Engineer III, Machine Learning Compiler, TPU Scaling Share Software Engineer III, Machine Learning Compiler, TPU Scaling _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Share Software Engineer III, Machine Learning Compiler, TPU Scaling _info_outline_ XIn most instances, this position requires in-person interviews as part of the hiring process. **Minimum qualifications:**

• Bachelor’s degree or equivalent practical experience.
• 2 years of experience in low level systems programming languages (e.g. C++ or C).
• 1 year of experience with one or more of the following: Speech/audio (e.g., technology duplicating and responding to the human voice), reinforcement learning (e.g., sequential decision making), ML infrastructure, or specialization in another ML field.
• 1 year of experience with end-to-end Machine Learning (e.g., model deployment, model evaluation, data processing, debugging).
• Experience in performance optimization and compiler development.

**Preferred qualifications:**

• Master's degree or PhD in Computer Science or related technical fields.
• 2 years of experience with data structures and algorithms.
• Experience developing accessible technologies.
• Experience with Hardware Design, Hardware Architecture.

**About the job** Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. Our team develops the ML Compiler (XLA) for running workloads on thousands of TPU, GPU or other accelerators. Accelerated Linear Algebra (XLA) powers all Google’s internal ML workloads and is a preferred choice for external foundational model producers and researchers for its advanced performance, usability and open source nature. As part of the team, you will be developing the compiler's ability to generate efficient communication on TPU. Your team will develop the compiler's horizontal scaling stack including collective op lowering, hiding communication latency, program sharding and more. Together these make it possible to train and serve the world's largest models efficiently on TPU.Google Cloud accelerates every organization’s ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google’s technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $147000 - $210000 (USD) + 15% bonus target + equity + benefits Learn more aboutbenefits at Google ( . **Responsibilities**

• Execute solutions in one or more specialized ML areas, utilize ML infrastructure, and contribute to model optimization and data processing.
• Implement and optimize collective operations (e.g., all-reduce, all-gather, reduce-scatter, all-to-all) in the XLA TPU backend, from HLO-level transformations to low-level code generation.
• Improve compiler scheduling to overlap communication with computation, balancing latency, memory pressure and throughput.
• Analyze current and upcoming TPU architecture and interconnect features and use them to improve scaling performance.
• Work with ML performance and research teams to diagnose scaling bottlenecks and reach roofline performance on critical workloads.

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