Principal ASIC Design Engineer - Terawave

Principal ASIC Design Engineer A technical authority for the design of advanced ASICs enabling next‑generation satellite communication systems. This role creates architecture, drives implementation strategy, and leads critical decisions across silicon programs. Responsibilities Define top‑level or cross‑subsystem digital architecture for satellite communication ASICs and SoCs. Lead hardware realization of key communication functions such as modem pipelines, coding engines, digital beamforming, switching fabrics, and packet/data processing. Drive end‑to‑end technical planning from concept through silicon validation. Establish system‑level tradeoffs among throughput, latency, power, die area, reliability, and manufacturability. Provide technical leadership across design, verification, physical design, firmware, packaging, and system teams. Review and influence architectural partitioning between ASIC, FPGA, software, and RF/analog domains. Develop methodologies and reusable IP strategies to improve schedule, quality, and scalability. Mentor technical leaders and act as a go‑to expert for critical design reviews and issue resolution. Support roadmap planning and future product definition. Minimum Qualifications BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field. 12+ years of ASIC design experience, including ownership of complex chips or multiple tape‑outs. Expert‑level knowledge of digital design, microarchitecture, and full‑chip tradeoffs. Proven success leading technically exciting silicon programs. Strong understanding of communication signal‑processing hardware and system integration. Ability to influence across organizations and communicate complex technical topics clearly. Preferred Qualifications Deep expertise in space‑based communications, digital modems, phased arrays, or payload processing. Experience with advanced FEC architectures, timing recovery, carrier recovery, or channel adaptation hardware. Familiarity with rad‑hard, fault‑tolerant, or high‑availability digital design techniques. Experience guiding architecture across both commercial and mission‑critical applications. Strong record of innovation, patents, publications, or major product launches. Compensation California: $230,773.00 – $323,081.85. Washington: $230,773.00 – $323,081.85. Other site ranges may differ. Benefits Medical, dental, vision, basic and supplemental life insurance. Paid parental leave, short and long‑term disability. 401(k) with a company match of up to 5% and an Education Support Program. Stock options for all regular employees (≥20 hours/week). Paid time off: up to four weeks per year based on weekly scheduled hours; up to 14 company‑paid holidays. Equal Employment Opportunity Blue Origin is an Equal Opportunity/Affirmative Action Employer committed to building an inclusive workplace. We provide equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, military status, or other protected status. EEO Contact Applicants wishing to receive information on Blue Origin’s EEO plans or requiring reasonable accommodations should contact View email address on click.appcast.io. #J-18808-Ljbffr Blue Origin LLC