Senior DFT Engineer - SoC/ASIC Test & Flow Expert

Quest Global in California is seeking an experienced Design for Test (DFT) Engineer to contribute to the development of complex SoC/ASIC designs. You will lead DFT planning and integration, define testing methodologies, and pursue continuous improvements of DFT flows across chip-level and block-level implementations to ensure robust manufacturing outcomes. The role emphasizes hands-on work with Tessent tool flows, ATPG generation, ATE interface integration, and silicon failure analysis. #J-18808-Ljbffr