Staff Engineer - Power Management IC Design

Company Qualcomm Technologies, Inc. Job Area Engineering Group; PMIC Design General Summary Oversees definition, design, verification, and documentation of mixed‑signal integrated circuits and products in the field of Power Management, with emphasis on controller ICs and integrated high‑current power stage circuitry for compute, data center, automotive, and industrial applications. Determines IC architecture and circuit‑level specifications based on defined product and platform requirements. Actively involved in all aspects of the design flow, from architecture implementation and simulation through transistor‑level circuit design and verification. Heavy involvement in overseeing layout execution, silicon bring‑up, characterization, and debug is expected. Requires expertise in power electronics, control theory, mixed‑signal circuit design, high‑speed and high‑drive circuits, power stage interfaces, electro‑migration and transistor reliability, and behavioral modeling. Uses tools such as Cadence ADE, Spectre, MATLAB, Verilog/Verilog‑AMS, SystemVerilog, Simplis, and related tools. Preferred Qualifications 6+ years of experience in analog, mixed‑signal, or Power Management integrated circuit design with a Master's or PhD in Electrical Engineering. Demonstrated experience in Power Electronics, Control Theory, Multiphase Buck Controllers, High‑Accuracy Analog Front Ends, High‑Speed or High‑Drive Circuits, Very Low Power or Precision References, Electro‑Migration and Transistor Reliability, Behavioral Modeling, or Mixed‑Signal Verification Techniques. Principal Duties and Responsibilities Use tools/applications such as Cadence ADE, Spectre, MATLAB, etc. to execute architecture implementation, circuit design, and verification of complex IC blocks and subsystems according to design specifications and requirements. Own the design and verification strategy for assigned blocks or subsystems within power management ICs, including controller circuitry and integrated high‑current power stage interfaces. Guide layout engineers independently to generate high‑quality layouts and conduct physical and reliability verification of circuits. Run advanced functionality and performance checks to ensure designs meet specifications across PVT and operating conditions. Interpret simulation, silicon characterization, and debug results, driving corrective design actions where needed. Document detailed design intent, architectural decisions, circuit functionality, and silicon findings for complex PMIC subsystems. Collaborate closely with validation, test, and product engineering teams to support silicon bring‑up, characterization, qualification, and production ramp. Maintain awareness of industry trends, competitor products, and advances in power management circuits; apply insights to ongoing and future designs. Provide technical guidance and informal mentoring to other engineers through design reviews and technical problem solving. Level of Responsibility Work with high independence and minimal supervision on complex design problems. Make decisions with moderate to high impact on product performance, schedule, and silicon success; errors may require cross‑functional involvement to resolve. Use clear verbal and written communication to convey complex technical information to audiences with varying levels of expertise. Operate within prescribed project scope, schedule, and resource constraints. Complete tasks involving multiple interdependent steps, requiring planning, prioritization, and sound engineering judgment. Exercise creativity and technical judgment to generate original design solutions within established guidelines. Apply deductive and inductive problem‑solving techniques where information may be incomplete or ambiguous. May be consulted during strategic planning periods for technical input and feasibility assessment. Minimum Qualifications Bachelor's degree in Electrical Engineering and 6+ years of analog, mixed‑signal or Power Management integrated circuit design experience. OR Master’s degree in Electrical Engineering or related field and 4+ years of analog, mixed‑signal or Power Management integrated circuit design experience. OR PhD in Electrical Engineering or related field and 2+ years of analog, mixed‑signal or Power Management integrated circuit design experience. 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL. EEO Statement Qualcomm is an equal opportunity employer. Benefits Pay range: $153,200 – $229,800 per year. Additional compensation includes a competitive annual discretionary bonus program and opportunity for annual RSU grants. #J-18808-Ljbffr