Senior ASIC Physical Design Engineer: SerDes & SI
$120k - $192kItlearn360
Itlearn360 is seeking a Senior ASIC Physical Design Engineer to contribute to SerDes connectivity ASICs at their data center products. Candidates should have an MS in Electrical or Computer Engineering and over 6 years of physical design experience. This role requires deep knowledge of industry standards in Physical Design, scripting experience, and understanding of IC product development. The compensation ranges from $120,000 to $192,000, with additional benefits including medical, dental, and 401(k) matching. #J-18808-Ljbffr
Vacancy posted 11 hours ago
Similar jobs that could be interesting for youBased on the Senior ASIC Physical Design Engineer: SerDes & SI in San Jose, CA vacancy
$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...Senior- ...Broadcom Inc. is looking for a Physical Design Engineer to join the ASIC Products Division in San Jose, CA. This role involves working with cutting-edge technology to drive next-gen AI designs while executing Physical Design and Verification processes. The ideal candidate...Senior
Broadcom Corporation
San Jose, CA1 day ago - NVIDIA Gruppe is looking for a skilled physical designer to handle the design and implementation of GPUs and other ASICs targeted at diverse markets such as desktop and mobile. Ideal candidates will possess at least 5 years of experience in VLSI design implementation, with...Senior
$153.2k - $229.8k
...Qualcomm is seeking an experienced ASIC Engineer to drive the development of high-performance IP for world-class products in Santa Clara,... ...candidate should have at least 4 years of experience in ASIC design and possess a relevant degree. Responsibilities include defining...SeniorQualcomm
Santa Clara, CA11 hours ago$120k - $220k
E-Space is looking for an experienced Physical Design Engineer to lead complex ASIC and SoC designs. With a focus on innovative satellite technology, you'll work with cutting-edge tools like Cadence Innovus. The role requires a minimum of 8 years of experience in physical...Senior$200k - $280k
YOH Services LLC is seeking a Sr. High-Speed SI/PI Design Engineer in Santa Clara, California. The role involves modeling and simulating high-speed interfaces, designing Power Delivery Networks, and collaborating with package layout engineers. The ideal candidate will have...Senior- ...A tech-focused company in San Jose is seeking exceptional Physical Design engineers to own block-level implementation and verification. Responsibilities include driving timing closure and PPA optimization, collaborating with RTL Designers, and supervising design flow improvements...Senior
ETCHED LLC
San Jose, CA10 hours ago $170k - $230k
...the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience... ...AND BENEFITS Pay range: Physical Design Engineer/Senior: $170,000.00 - $230,000.00 per year Your actual level and...SeniorPermanent employmentTemporary workWorldwideWeekend workJobr
Sunnyvale, CA1 day ago- ...Cisco Systems, Inc. seeks an ASIC Design Engineer to join the Silicon One team in San Jose, California. This role involves developing methodologies... ...for static timing analysis and collaborating with the Physical Design team to ensure design accuracy. Ideal candidates will...Senior
Cisco
San Jose, CA11 hours ago $120k - $192k
...Broadcom Inc. is seeking an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division in San Jose. This role involves working with advanced technologies to drive the next generation of Artificial Intelligence and PCIe Switch Products. As an expert...SeniorRemote workBroadcom Corporation
San Jose, CA11 hours ago- ...Responsibilities Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets. As a member of a team, establish physical design methodologies, flow automation, chip floorplan,...Senior
NVIDIA Gruppe
Santa Clara, CA1 day ago - ...Job Title: Senior Physical Design Engineer (MULTIPLE OPENINGS) Salary Range : $216,091-218,000/ Year / 40HRS/WK Location: Cupertino... ...to meet timing specifications. Conduct signal integrity (SI) analysis, including noise, crosstalk, and transition-time...Senior
Neetha Consulting LLC
Cupertino, CA1 day ago $136k - $212.75k
...clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible... .... The team collaborates with the front design team to understand the clocking requirements... ...and back end team to help craft the physical floorplan of the chip. The team explains...SeniorWork experience placementNVIDIA
Santa Clara, CA1 day ago$140k - $170k
...Credo is engineering the future of high-speed connectivity for the... ...optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance,... ...Connect. About the Role As a Senior Physical Design Engineer, you will manage...SeniorLocal areaCredo Semiconductor Inc
San Jose, CA11 hours ago- An established industry player is seeking a skilled Physical Design Engineer to join their innovative team. In this long-term contract role, you... ...complex design issues, and contribute to the integration of ASIC/SoC designs. If you have a passion for physical design and want...Long term contractRemote work
Central Business Solutions
San Jose, CA1 day ago $250k - $290k
Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company... ...Collaborate with RTL, Verification, Physical Design, and Firmware teams to ensure... ...with high-speed I/O (PCIe Gen5/Gen6, SerDes) and software control plane...SeniorMonday to Friday$200k
Sr. High-Speed SI/PI Design Engineer Signal Integrity (SI): Model and simulate high-speed interfaces (e.g., 224G-PAM4 SerDes). Perform channel simulations (TX-to-RX) across packages and... ...Functional Collaboration: Interface with ASIC, system, layout, and test teams....Senior$200k - $220k
...A semiconductor startup in California is seeking a Staff/Senior Staff Physical Design Engineer to lead physical design implementations. The role requires 8-12 years of experience in ASIC design, with a focus on timing, power, and area optimizations. Candidates should have...SeniorBolt Graphics
Sunnyvale, CA11 hours ago$116k - $189.75k
...What You'll Be Doing: Drive Physical Design and timing analysis and closure of NVIDIA's GPUs,... ...degree or higher in Electrical or Computer Engineering (or equivalent experience). Proficiency... ...experience in timing convergence for ASICs, CPUs, GPUs or Network processors....NVIDIA Gruppe
Santa Clara, CA11 hours ago$200k - $220k
...semiconductor startup based in California is seeking a Staff/Senior Staff Physical Design Engineer to drive full-chip implementations and meet PPA targets. This role requires 8-12 years of experience in ASIC physical design, specializing in tools like Synopsys ICC2 and...Senior- ...leading technology company in California is seeking a Senior Physical Design Integration Engineer to handle CPU design implementation and optimization. The... ...proven leadership skills and extensive experience in ASIC design, with at least 12 years of relevant work history...Senior
$178k - $389k
...Micron Technology, Inc in San Jose, California, is seeking a Physical Design Engineer to lead the full physical design flow for high-speed interface chips. You will be responsible for defining and implementing full-chip floorplans, executing place and route, and ensuring...SeniorMicron Technology
San Jose, CA11 hours ago$200k - $220k
Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient... ...Engineering or related field 8-12 years of experiencein ASIC physical design Proven experience infull-chip or large...Senior- ...Advanced Micro Devices in Santa Clara is looking for a skilled engineer to contribute to ASIC design for high-performance network chips. You'll work within the NTSG ASIC Design Team focusing on achieving first-pass silicon success through collaboration with architecture...Senior
Advanced Micro Devices , Inc.
Santa Clara, CA10 hours ago $180k - $223k
...A cutting-edge technology company in San Jose is seeking an ASIC Sr. Staff Engineer responsible for the design and debug of complex digital subsystems. The ideal candidate will have a BS or MS in Electrical Engineering and over 5 years of experience in ASIC design and...SeniorAyar Labs
San Jose, CA11 hours ago$126.8k - $220.9k
...A leading technology company is seeking a Physical Design Engineer to contribute to the design of high performance PHY from RTL to GDSII. Responsibilities include generating timing constraints, building chip floor-plans, and validating designs adhering to power and timing...SeniorApple
Cupertino, CA10 hours ago$256.05k - $361.48k
# **Welcome!**## .Senior Physical Design Integration Engineer page is loaded## Senior Physical Design Integration Engineerlocations: US, California, Folsom... ...and performance Experience in: Logic Design, VLSI/ASIC Design, Computer Architecture Current Industry Experience...SeniorWork experience placementLocal areaImmediate startFlexible hoursShift work$120k - $220k
...will fundamentally change the design, economics, manufacturing and... ...WHAT YOU WILL BE DOING: Lead physical design implementation from... ...development and mentor junior engineers WHAT YOU BRING TO THIS ROLE:... ...physical design of complex digital ASICs or SoCs Deep expertise in...SeniorFull timeWork at officeImmediate startVisa sponsorshipeSpace
Saratoga, CA11 hours ago$168k - $264.5k
...inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products –...SeniorNVIDIA Gruppe
Santa Clara, CA10 hours ago- Apple Inc. in Cupertino, California is seeking talented Analog Mixed-Signal designers to join their high-speed SerDes team. The role involves working on high-performance wireline transceivers and leading discussions with cross-functional teams to create specifications....Senior
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior ASIC Physical Design Engineer: SerDes & SI. Be the first to apply!
Related searches
- data center design engineer San Jose, CA
- senior design verification engineer San Jose, CA
- director of product engineering San Jose, CA
- ic design engineer San Jose, CA
- cad design engineer solidworks San Jose, CA
- physical design engineer San Jose, CA
- semiconductor product engineer San Jose, CA
- chief design engineer San Jose, CA
- product engineering manager San Jose, CA
- sr. product engineer San Jose, CA