Senior CAD DV Engineer - RTL Regression & Silicon Tools
$147.4k - $272.1kApple Oakbrook
A leading technology company in San Francisco seeks a software engineer to develop systems for regression testing of silicon designs. The position requires a minimum of a BS degree and 3 years of relevant experience, with strong Python programming skills. Candidates familiar with Verilog and SystemVerilog, and those with communication skills, will excel. Apple offers competitive compensation between $147,400 and $272,100 as well as comprehensive benefits and stock options. #J-18808-Ljbffr
Vacancy posted 1 day ago
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