Sr. Staff Software Development Engineer

Responsibilities & Skills A successful candidate will join a team designing and developing Lattice FPGA software tools in San Jose. The candidate will contribute to research, design and development of the software FPGA device model and configuration bitstream generation tools. The candidate is expected to work closely with cross‑functional teams to plan and execute Lattice FPGA software release cycle including requirement analysis, feature scoping, development, testing and validation. The candidate also will be responsible for maintaining existing software product tools and develop improvement plan to increase the test coverage to achieve high product quality. Qualifications Bachelors, Masters, or better in Computer Science, Computer Engineering, Electrical Engineering, or related fields with 10+ years of experience in EDA SW Tool development Strong communication skills Knowledge or experience in FPGA architecture and FPGA software tools, specifically for device modeling and/or bitstream generation Programming skills (C++ and Python) Hands‑on experience in RTL design and digital design, testbench development, logic verification, timing closure and debugging including board validation Benefits The base pay for this role is between $193,000 to $242,000 per year. In addition to base salary, we offer an incentive plan bonus, and new hire equity for a competitive total compensation package. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Applications are welcome from all qualified candidates. #J-18808-Ljbffr Lattice Semiconductor