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ASIC Verification Engineer

$60 - $71 per hour

KForce

DescriptionKforce is immediately seeking an experienced ASIC Verification Engineer to support our enterprise networking and cloud solutions customer based in Carlsbad, CA.Summary:We are seeking a collaborative Design Verification Engineer with 5-12 years of industry experience to help create cutting edge System-on-Chip (SoC) designs delivered first time right. The ASIC Verification Engineer will work in a collaborative environment, participating in architectural decisions and verification strategies that directly impact product success. Our team values diverse perspectives and creative problem-solving approaches to deliver exceptional customer experiences.Responsibilities:* Develop and implement Universal Verification Methodology (UVM) based verification environments* Create comprehensive verification plans at both block and system levels* Design and implement verification components including assertions, traffic generators, agents, and scoreboards* Collaborate with cross-functional teams to evaluate design testability and verification requirements* Lead debug efforts and provide solutions for complex technical challengesRequirements* Bachelor's degree in Electrical Engineering or a related field* UVM Based testbench development experience* Experience in ASIC or SOC verification* Demonstrated experience in developing test plans and verification infrastructure* Practical knowledge of verification methodologies from block level to system level* Proficiency in System Verilog* Experience in identifying and resolving complex design and verification issues* Timing and gate level simulation experience* C coding for firmware delivery for post silicon bringup experiencePreferred Qualifications:* Bachelor's/Master's degree in Electrical or Communications Engineering or a related field* Experience with formal verification techniques including abstraction and end-to-end checking* Experience with industry-standard tools and scripting languages (Python or Perl) for automation* System Verilog coding and debug experience* AI based CAD efficiency improvisation initiatives High speed serial protocols preferred UCIe, PCIE, etc.* Analog debug experience including DAC/ADC & calibrations white-box verificationJob TypeContractCompensation60 - $71

Vacancy posted 21 hours ago
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